LMC6681 Datasheet, PDF (6/24 Pages) National Semiconductor (TI) – Low Voltage, Rail-To-Rail Input and Output CMOS

5V DC Electrical Characteristics
Unless otherwise specified, all limits guaranteed for T_J = 25˚C, V⁺ = 5.0V, V− = 0V, V_CM = V_O = V⁺/2, V_PD = 0.9V and R_L >
1 MΩ. Boldface limits apply at the temperature extremes (Note 16).
LMC6681AI LMC6681BI
Symbol
Parameter
Conditions
Typ
(Note 5)
LMC6682AI
LMC6684AI
Limit
LMC6682BI
LMC6684BI
Limit
Units
(Note 6)
(Note 6)
V_OS
Input Offset Voltage
V_CM = 1.5V
0.5
1
2.5
3
mV
4.5
max
TCV_OS
Input Offset Voltage
1.5
Average Drift
µV/˚C
I_B
I_OS
R_IN
C_IN
CMRR
Input Current
Input Offset Current
Input Resistance
Input Capacitance
Common Mode
(Note 12)
(Note 12)
(Note 13)
0.08
20
0.04
10
>1
3
82
70
20
pA max
10
pA max
Tera Ω
pF
65
dB
Rejection Ratio
65
62
min
PSRR
Power Supply Rejection ±1.5V ≤ V_S ≤ ±2.5V
82
70
Ratio
V_O = V⁺/2 = V_CM
V_CM
Input Common Mode
CMRR > 50 dB
65
5.3
5.18
Voltage Range
5.00
65
dB
62
min
5.18
V
5.00
min
−0.3
−0.18
−0.18
V
0.00
0.00
max
V_O
Output Swing
R_L = 2 kΩ to V⁺/2
4.9
4.85
4.58
4.85
V
4.58
min
0.05
0.2
0.2
V
0.28
0.28
max
I_{S ON}
Supply Current
when Powered ON
Single, LMC6681
V_CM = 1.5V
Dual, LMC6682
0.8
1.24
1.49
1.5
2.48
1.24
mA
1.49
max
2.48
mA
V_CM = 1.5V
Quad, LMC6684
3.00
3.0
4.96
3.00
max
4.96
mA
I_{S OFF}
Supply Current
when Powered OFF
V_CM = 1.5V
Single, LMC6681
V_PD = 4.3V
Dual, LMC6682
6.00
0.5
1.5
2.1
0.5
1.5
6.00
max
1.5
µA
2.1
max
1.5
µA
V_PD = 4.3V
Quad, LMC6684
2.1
1.0
3.0
2.1
max
3.0
µA
V_PD = 4.3V
4.2
4.2
max
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