LMC6681 Datasheet, PDF (17/24 Pages) National Semiconductor (TI) – Low Voltage, Rail-To-Rail Input and Output CMOS

6.0 Powerdown (Continued)
6.3 TEST CIRCUIT TO MEASURE t_ON AND t_OFF
The circuit used to measure the t_ON, and t_OFF during the
powerdown operation is a voltage follower with a load of
2 kΩ as shown in Figure 14.
When the input to the powerdown pin is low, the LMC6681/
2/4 is on. Since the amplifier is connected in the voltage fol-
lower configuation, the output of the circuit is −1V. When the
powerdown pin is pulled high, the amplifier shuts down, and
draws less than 1 µA/Amplifier. In this powerdown mode, the
output pin has high impedance, and the output of the circuit
is pulled to 0V. t_ON is specified as the time between the 50%
points of the trailing edges of the input waveform at the pow-
erdown pin, and the waveform at the output pin. Similarly,
the t_OFF is specified as the time between the 50% points of
the leading edges of the input waveform at the powerdown
pin, and the waveform at the output pin.
FIGURE 14. Test Circuit for t_ON and t_OFF Measurements
DS012042-16
(a) t_OFF Measurement
DS012042-17
FIGURE 15.
6.4 t_ON and t_OFF
The t_ON (time delay for device to power on) the t_OFF (time de-
lay for device to power off) specs are guaranteed at a supply
voltage of 3V. The t_ON and t_OFF spec are independent of the
V_PD applied in the specified range. Refer to the Powerdown
DC Threshold Characteristics table for the values for a logic
low and a logic high.
The guaranteed spec for t_ON is 200 µs. This does not mean
that the signal to the V_PD pin can be as high as 5 kHz (1/200
µs). Note that the V_PD frequency for the t_ON and t_OFF mea-
surements is 5 Hz. The LMC6681/2/4 is ideal for DC type ap-
plications where the powerdown pin is controlled by low fre-
quency signals.
When the LMC6681/2/4 is powered off, internal bias currents
are shutoff. There is a inherent latency in the circuit, and the
device has to power off for a certain period of time for the t_ON
spec to apply. Refer to the figure below. t_{PD OFF} refers to the
time interval for which the device is in the powerdown mode.
Consider the case when the device has been powered off for
5 ms, and then the powerdown pin is pulled to a logic low.
From Figure 16, at room temperature, the device powers on
after 500 µs.
17
(b) t_ON Measurement
DS012042-29
DS012042-39
FIGURE 16. t_ON Delay Till Active-On after
t_PDOFF in Powerdown Mode, V_S = 3V
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