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DS99R421 Datasheet, PDF (6/18 Pages) National Semiconductor (TI) – 5-43 MHz FPD-Link LVDS (3 Data + 1 Clock) to Single Embedded Clock DC-Balanced LVDS Converter | |||
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AC Timing Diagrams and Test Circuits
FIGURE 3. LVDS Input Checkerboard Pattern
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FIGURE 4. Serializer LVDS Output Load and Transition Times
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FIGURE 5. RxIN to DOUT Delay â RCTCD
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