DS90CR217_06 Datasheet, PDF (6/12 Pages) National Semiconductor (TI) – +3.3V Rising Edge Data Strobe LVDS 21-Bit Channel Link - 85 MHz

AC Timing Diagrams (Continued)
Note 5: Measurements at V_DIFF = 0V
Note 6: TCCS measured between earliest and latest LVDS edges
Note 7: TxCLK Differential Low→High Edge
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FIGURE 4. DS90CR217 (Transmitter) Channel-to-Channel Skew
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FIGURE 5. DS90CR217 (Transmitter) Setup/Hold and High/Low Times
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FIGURE 6. DS90CR217 (Transmitter) Clock In to Clock Out Delay
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