DS90CF363 Datasheet, PDF (6/9 Pages) National Semiconductor (TI) – +3.3V LVDS Transmitter 18-Bit Flat Panel Display (FPD) Link─65 MHz

AC Timing Diagrams (Continued)
FIGURE 9. Seven Bits of LVDS in One Clock Cycle
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FIGURE 10. 21 Parallel TTL Data Inputs Mapped to LVDS Outputs
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FIGURE 11. Transmitter Power Down Delay
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