DS90CF363 Datasheet, PDF (5/9 Pages) National Semiconductor (TI) – +3.3V LVDS Transmitter 18-Bit Flat Panel Display (FPD) Link─65 MHz

AC Timing Diagrams (Continued)
DS100032-9
Measurements at V_diff = 0V
TCCS measured between earliest and latest LVDS edges
TxCLK Differential Low → High Edge
FIGURE 5. DS90CF363 (Transmitter) Channel-to-Channel Skew
DS100032-10
FIGURE 6. DS90CF363 (Transmitter) Setup/Hold and High/Low Times
DS100032-12
FIGURE 7. DS90CF363 (Transmitter) Clock In to Clock Out Delay
DS100032-14
FIGURE 8. DS90CF363 (Transmitter) Phase Lock Loop Set Time
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