LMH6560 Datasheet, PDF (5/23 Pages) National Semiconductor (TI) – Quad, High-Speed, Closed-Loop Buffer

3V Electrical Characteristics
Unless otherwise specified, all limits guaranteed for T_J = 25˚C, V⁺ = 3V, V^− = 0V, V_O = V_CM = V⁺/2 and R_L = 100Ω to V⁺/2.
Boldface limits apply at the temperature extremes.
Symbol
Parameter
Conditions
Min
Typ
Max
(Note 9) (Note 8) (Note 9)
Units
Frequency Domain Response
SSBW
GFN
Small Signal Bandwidth
Gain Flatness < 0.1dB
FPBW Full Power Bandwidth (−3dB)
Time Domain Response
V_O < 0.5V_PP
V_O < 0.5V_PP
V_O = 1V_PP (+4.5dBm)
265
MHz
40
MHz
115
MHZ
t_r
Rise Time
t_f
Fall Time
t_s
Settling Time to 0.1%
OS
Overshoot
1V Step (20-80%)
1V Step
0.5V Step
1.1
ns
1.3
ns
11
ns
0
%
SR
Slew Rate
(Note 11)
480
V/µs
Distortion And Noise Performance
HD2
2^nd Harmonic Distortion
HD3
3^rd Harmonic Distortion
THD
Total Harmonic Distortion
e_n
Input-Referred Voltage Noise
CP
1dB Compression Point
V_O = 0.5V_PP; f = 20MHz
V_O = 0.5V_PP; f = 20MHz
V_O = 0.5V_PP; f = 20MHz
f = 1MHz
f = 10MHz
−55
dBc
−61
dBc
−54
dBc
3
nV/
+4
dBm
CT
Amplifier Crosstalk
SNR
AGM
Signal to Noise Ratio
Amplifier Gain Matching
Static, DC Performance
Receiving Amplifier:
R_S = 50Ω to V⁺/2; f = 10MHz
f = 5MHz; V_O = 1V_PP
R_L = 2kΩ to V⁺/2;
f = 5MHz; V_O = 1V_PP
−55
dB
120
dB
0.4
dB
A_CL
Small Signal Voltage Gain
V_OS
Input Offset Voltage
V_O = 100mV_PP
R_L = 100Ω to V⁺/2
V_O = 100mV_PP
R_L = 2kΩ to V⁺/2
0.97
0.99
V/V
0.99
0.997
1.6
8
mV
10
TC V_OS
Temperature Coefficient Input
Offset Voltage
(Note 12)
2.6
µV/˚C
I_B
Input Bias Current
(Note 10)
−3
−1.4
µA
−3.5
TC I_B
Temperature Coefficient Input
Bias Current
(Note 12)
0.3
nA/˚C
R_OUT
Output Resistance
R_L = 100Ω to V⁺/2; f = 100kHz
2.1
R_L = 100Ω to V⁺/2; f = 10MHz
2.8
Ω
PSRR Power Supply Rejection Ratio
V_S = +3V to V_S = +3.5V;
48
65
dB
V_IN = V_S/2
46
I_S
Supply Current, All 4 Buffers
No Load
11
15
mA
18
Miscellaneous Performance
R_IN
Input Resistance
C_IN
Input Capacitance
17
kΩ
2
pF
5
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