DS91C180_07 Datasheet, PDF (5/14 Pages) National Semiconductor (TI) – 100 MHz M-LVDS Line Driver/Receiver Pair

Switching Characteristics
Over recommended operating supply and temperature ranges unless otherwise specified. (Notes 3, 8)
Symbol
Parameter
Conditions
Min Typ Max Units
DRIVER AC SPECIFICATION
t_PLH
Differential Propagation Delay Low to High
t_PHL
Differential Propagation Delay High to Low
t_SKD1 (t_sk(p))
Pulse Skew |t_PLHD − t_PHLD| (Notes 5, 9)
t_SKD3
Part-to-Part Skew (Notes 6, 9)
t_TLH (t_r)
Rise Time (Note 9)
t_THL (t_f)
Fall Time (Note 9)
t_PZH
Enable Time (Z to Active High)
t_PZL
Enable Time (Z to Active Low )
t_PLZ
Disable Time (Active Low to Z)
t_PHZ
Disable Time (Active High to Z)
t_JIT
Random Jitter, RJ (Note 9)
f_MAX
Maximum Data Rate
RECEIVER AC SPECIFICATION
R_L = 50Ω, C_L = 5 pF,
C_D = 0.5 pF
Figure 7 and Figure 8
R_L = 50Ω, C_L = 5 pF,
C_D = 0.5 pF
Figure 9 and Figure 10
100MHz clock pattern (Note 7)
1.0 3.4 5.5 ns
1.0 3.1 5.5 ns
300 420 ps
1.9 ns
1.0 1.8 3.0 ns
1.0 1.8 3.0 ns
8
ns
8
ns
8
ns
8
ns
2.5 5.5 psrms
200
Mbps
t_PLH
t_PHL
t_SKD1 (t_sk(p))
t_SKD3
t_TLH (t_r)
t_THL (t_f)
t_PZH
t_PZL
t_PLZ
t_PHZ
f_MAX
Propagation Delay Low to High
Propagation Delay High to Low
Pulse Skew |t_PLHD − t_PHLD| (Notes 5, 9)
Part-to-Part Skew (Notes 6, 9)
Rise Time (Note 9)
Fall Time (Note 9)
Enable Time (Z to Active High)
Enable Time (Z to Active Low)
Disable Time (Active Low to Z)
Disable Time (Active High to Z)
Maximum Data Rate
C_L = 15 pF
Figures 11, 12 and Figure 13
R_L = 500Ω, C_L = 15 pF
Figure 14 and Figure 15
2.0 4.7 7.5 ns
2.0 5.3 7.5 ns
0.6 1.9 ns
1.5 ns
0.5 1.2 3.0 ns
0.5 1.2 3.0 ns
10 ns
10 ns
10 ns
10 ns
200
Mbps
Note 1: “Absolute Maximum Ratings” are those beyond which the safety of the device cannot be guaranteed. They are not meant to imply that the device should
be operated at these limits. The tables of “Electrical Characteristics” provide conditions for actual device operation.
Note 2: All currents into device pins are positive; all currents out of device pins are negative. All voltages are referenced to device ground unless otherwise
specified.
Note 3: All typicals are given for V_CC = 3.3V and T_A = 25°C.
Note 4: The algebraic convention, in which the least positive (most negative) limit is designated as minimum, is used in this datasheet.
Note 5: t_SKD1, |t_PLHD − t_PHLD|, is the magnitude difference in differential propagation delay time between the positive going edge and the negative going edge of
the same channel.
Note 6: t_SKD3, Part-to-Part Skew, is defined as the difference between the minimum and maximum specified differential propagation delays. This specification
applies to devices at the same V_CC and within 5°C of each other within the operating temperature range.
Note 7: Stimulus and fixture jitter has been subtracted.
Note 8: C_L includes fixture capacitance and C_D includes probe capacitance.
Note 9: Not production tested. Guaranteed by a statistical analysis on a sample basis at the time of characterization.
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