DS91C180_07 Datasheet, PDF (11/14 Pages) National Semiconductor (TI) – 100 MHz M-LVDS Line Driver/Receiver Pair

Function Tables
DS91D180/DS91C180 Transmitting
Inputs
DE
D
2.0V 2.0V
2.0V 0.8V
0.8V X
Outputs
Z
Y
L
H
H
L
Z
Z
X — Don't care condition
Z — High impedance state
DS91D180 Receiving
Inputs
Output
RE
A−B
R
0.8V _{≥ +0.05V}
H
0.8V _{≤ −0.05V}
L
0.8V
0V
X
2.0V
X
Z
X — Don't care condition
Z — High impedance state
DS91C180 Receiving
Inputs
Output
RE
A−B
R
0.8V _{≥ +0.15V}
H
0.8V _{≤ +0.05V}
L
0.8V
0V
L
2.0V
X
Z
X — Don't care condition
Z — High impedance state
DS91D180 Receiver Input Threshold Test Voltages
Applied Voltages
V_IA
2.400V
0.000V
3.800V
3.750V
−1.400V
−1.350V
V_IB
0.000V
2.400V
3.750V
3.800V
−1.350V
−1.400V
Resulting Differential Input
Voltage
V_ID
2.400V
−2.400V
0.050V
−0.050V
−0.050V
0.050V
Resulting Common-Mode
Input Voltage
V_IC
1.200V
1.200V
3.775V
3.775V
−1.375V
−1.375V
H — High Level
L — Low Level
Output state assumes that the receiver is enabled (RE = L)
Receiver
Output
R
H
L
H
L
H
L
DS91C180 Receiver Input Threshold Test Voltages
Applied Voltages
V_IA
2.400V
0.000V
3.800V
3.800V
−1.250V
−1.350V
V_IB
0.000V
2.400V
3.650V
3.750V
−1.400V
−1.400V
Resulting Differential Input
Voltage
V_ID
2.400V
−2.400V
0.150V
0.050V
0.150V
0.050V
Resulting Common-Mode
Input Voltage
V_IC
1.200V
1.200V
3.725V
3.775V
−1.325V
−1.375V
H — High Level
L — Low Level
Output state assumes that the receiver is enabled (RE = L)
Receiver
Output
R
H
L
H
L
H
L
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