ADC08D1020_09 Datasheet, PDF (35/44 Pages) National Semiconductor (TI) – Low Power, 8-Bit, Dual 1.0 GSPS or Single 2.0 GSPS A/D Converter

2.0 Applications Information
2.1 THE REFERENCE VOLTAGE
The voltage reference for the ADC08D1020 is derived from a
1.254V bandgap reference, a buffered version of which is
made available at pin 31, V_BG, for user convenience.
This output has an output current capability of ±100 μA and
should be buffered if more current than this is required.
The internal bandgap-derived reference voltage has a nomi-
nal value of 650 mV or 870 mV, as determined by the FSR
pin and described in 1.1.4 The Analog Inputs.
There is no provision for the use of an external reference volt-
age, but the full-scale input voltage can be adjusted through
a Configuration Register in the Extended Control mode, as
explained in 1.2 NORMAL/EXTENDED CONTROL.
Differential input signals up to the chosen full-scale level will
be digitized to 8 bits. Signal excursions beyond the full-scale
range will be clipped at the output. These large signal excur-
sions will also activate the OR output for the time that the
signal is out of range. See 2.2.2 Out Of Range (OR) Indica-
tion.
One extra feature of the V_BG pin is that it can be used to raise
the common mode voltage level of the LVDS outputs. The
output offset voltage (V_OS) is typically 800 mV when the V_BG
pin is used as an output or left unconnected. To raise the
LVDS offset voltage to a typical value of 1175 mV the V_BG pin
can be connected directly to the supply rails.
2.2 THE ANALOG INPUT
The analog input is a differential one to which the signal
source may be a.c. coupled or d.c. coupled. In the normal
mode, the full-scale input range is selected using the FSR pin
as specified in the Converter Electrical Characteristics. In the
Extended Control mode, the full-scale input range is selected
by programming the Full-Scale Voltage Adjust register
through the Serial Interface. For best performance when ad-
justing the input full-scale range in the Extended Control, refer
to 1.4 REGISTER DESCRIPTION for guidelines on limiting
the amount of adjustment
Table 8 gives the input to output relationship with the FSR pin
high when the normal (non-extended) mode is used. With the
FSR pin grounded, the millivolt values in Table 8 are reduced
to 75% of the values indicated. In the Enhanced Control
Mode, these values will be determined by the full scale range
and offset settings in the Control Registers.
TABLE 8. Differential Input To Output Relationship
(Non-Extended Control Mode, FSR High)
V_IN+
V_CM − 217.5 mV
V_CM − 109 mV
V_IN−
V_CM + 217.5 mV
V_CM + 109 mV
V_CM
V_CM
Output Code
0000 0000
0100 0000
0111 1111 /
1000 0000
V_CM + 109 mV V_CM − 109 mV
V_CM + 217.5 mV V_CM − 217.5 mV
1100 0000
1111 1111
The buffered analog inputs simplify the task of driving these
inputs and the RC pole that is generally used at sampling ADC
inputs is not required. If it is desired to use an amplifier circuit
before the ADC, use care in choosing an amplifier with ade-
quate noise and distortion performance and adequate gain at
the frequencies used for the application.
Note that a precise d.c. common mode voltage must be
present at the ADC inputs. This common mode voltage,
V_CMO, is provided on-chip when a.c. input coupling is used
and the input signal is a.c. coupled to the ADC.
When the inputs are a.c. coupled, the V_CMO output must be
grounded, as shown in Figure 12. This causes the on-chip
V_CMO voltage to be connected to the inputs through on-chip
50 kΩ resistors.
IMPORTANT NOTE: An Analog input channel that is not used
(e.g. in DES Mode) should be connected to ac-ground (ie,
capacitors to ground) when the inputs are a.c. coupled. Do
not connect an unused analog input directly to ground.
20206244
FIGURE 12. Differential Input Drive
When the d.c. coupled mode is used, a common mode volt-
age must be provided at the differential inputs. This common
mode voltage should track the V_CMO output pin. Note that the
V_CMO output potential will change with temperature. The com-
mon mode output of the driving device should track this
change.
IMPORTANT NOTE: An analog input channel that is not used
(e.g. in DES Mode) should be tied to the V_CMO voltage when
the inputs are d.c. coupled. Do not connect unused analog
inputs to ground.
Full-scale distortion performance falls off rapidly as the
input common mode voltage deviates from V_CMO. This is
a direct result of using a very low supply voltage to min-
imize power. Keep the input common voltage within 50
mV of V_CMO.
Performance is as good in the d.c. coupled mode as it is in
the a.c. coupled mode, provided the input common mode
voltage at both analog inputs remain within 50 mV of V_CMO.
2.2.1 Handling Single-Ended Input Signals
There is no provision for the ADC08D1020 to adequately pro-
cess single-ended input signals. The best way to handle
single-ended signals is to convert them to differential signals
before presenting them to the ADC. The easiest way to ac-
complish single-ended to differential signal conversion is with
an appropriate balun-connected transformer, as shown in
Figure 13.
2.2.1.1. a.c. Coupled Input
The easiest way to accomplish single-ended a.c. input to dif-
ferential a.c. signal is by using an appropriate balun, as shown
inFigure 13.
35
www.national.com