COP8ACC5 Datasheet, PDF(34/41 Page) National Semiconductor (TI) – 8-Bit CMOS ROM Based Microcontrollers with 4k Memory and High Resolution A/D

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COP8ACC5 Datasheet, PDF (34/41 Pages) National Semiconductor (TI) – 8-Bit CMOS ROM Based Microcontrollers with 4k Memory and High Resolution A/D

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Instruction Set (Continued)

SBIT

RBIT

IFBIT

RPND

CLR

INC

DEC

LAID

DCOR

RRC

RLC

SWAP

IFC

IFNC

POP

PUSH

VIS

JMPL

JMP

JSRL

JSR

JID

RET

RETSK

RETI

INTR

NOP

#,Mem

A,Mem

A,[X]

A,Meml

A,[X]

B,Imm

Mem,Imm

Reg,Imm

A, [BÂ±]

A, [XÂ±]

A, [BÂ±]

A, [XÂ±]

[BÂ±],Imm

Addr.

Disp.

Addr.

Addr

Set BIT

Reset BIT

IF BIT

Reset PeNDing Flag

EXchange A with Memory

EXchange A with Memory [X]

LoaD A with Memory

LoaD A with Memory [X]

LoaD B with Immed.

LoaD Memory Immed

LoaD Register Memory Immed.

EXchange A with Memory [B]

EXchange A with Memory [X]

LoaD A with Memory [B]

LoaD A with Memory [X]

LoaD Memory [B] Immed.

CLeaR A

INCrement A

DECrement A

Load A InDirect from ROM

Decimal CORrect A

Rotate A Right thru C

Rotate A Left thru C

SWAP nibbles of A

Set C

Reset C

IF C

IF Not C

POP the stack into A

PUSH A onto the stack

Vector to Interrupt Service Routine

Jump absolute Long

Jump absolute

Jump relative short

Jump SubRoutine Long

Jump SubRoutine

Jump InDirect

RETurn from subroutine

RETurn and SKip

RETurn from Interrupt

Generate an Interrupt

No OPeration

1 to bit, Mem (bit = 0 to 7 immediate)

0 to bit, Mem

If bit #,A or Mem is true do next instruction

Reset Software Interrupt Pending Flag

A â Mem

A â [X]

A â Meml

A â [X]

B â Imm

Mem â Imm

Reg â Imm

A â [B], (B â B Â±1)

A â [X], (X âXÂ±1)

A â [B], (B â BÂ±1)

A â [X], (X â XÂ±1)

[B] â Imm, (B â BÂ±1)

Aâ0

AâA+1

AâAâ1

A â ROM (PU,A)

A â BCD correction of A (follows ADC, SUBC)

C â A7 â ... â A0 â C

C â A7 â... â A0 â C

A7...A4 â A3...A0

C â 1, HC â 1

C â 0, HC â 0

IF C is true, do next instruction

If C is not true, do next instruction

SP â SP + 1, A â [SP]

[SP] â A, SP â SP â 1

PU â [VU], PLâ[VL]

PC â ii (ii = 15 bits, 0 to 32k)

PC9...0 â i (i = 12 bits)

PC â PC + r (r is â31 to +32, except 1)

[SP]âPL, [SP-1] â PU,SP-2, PC â ii

[SP]âPL, [SP-1] â PU,SP-2, PC9...0 â i

PLâROM (PU,A)

SP + 2, PLâ [SP], PUâ [SP-1]

SP + 2, PLâ [SP],PUâ [SP-1], skip next instruction

SP + 2, PL â [SP],PUâ [SP-1],GIEâ1

[SP]â PL, [SP-1]â PU, SP-2, PCâ 0FF

PCâ PC + 1

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