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LMH6502 Datasheet, PDF (3/19 Pages) National Semiconductor (TI) – Wideband, Low Power, Linear-in-dB Variable Gain Amplifier
Electrical Characteristics(Note 2) (Continued)
Unless otherwise specified, all limits guaranteed for TJ = 25˚C, VS = ±5V, AV(MAX) = 10, VCM = 0V, RF = 1kΩ, RG = 174Ω,
VIN_DIFF = ±0.1V, RL = 100Ω, VG = +2V. Boldface limits apply at the temperature extremes.
Min
Typ
Max
Symbol
Parameter
Conditions
(Note 6) (Note 6) (Note 6) Units
DC & Miscellaneous Performance
GACCU
G Match
K
Gain Accuracy (See Application
Note)
Gain Matching (See Application
Note)
Gain Multiplier
(See Application Notes)
VG = 2.0V
1V < VG < 2V
VG = 2.0V
1 < VG < 2V
0.0
+0.6
dB
+0.6/−0.3 +3.1/−3.6
–
±0.6
dB
–
+2.8/−3.9
1.61
1.72
1.84
V/V
1.58
1.91
VCM
Input Voltage Range
Pin 3 & 6 Common Mode,
±2.0
±2.2
V
|CMRR| > 55dB (Note 9)
±1.70
VIN_DIFF Differential Input Voltage
Between pins 3 & 6
±0.3
±0.12
±0.39
V
I RG_MAX RG Current
Pins 4 & 5
±1.70
±2.22
mA
±1.56
IBIAS
Bias Current
TC IBIAS
I OFF
Bias Current Drift
Offset Current
Pins 3 & 6(Note 7)
Pins 3 & 6 (Note 7),
VS = ±2.5V
Pin 3 & 6(Note 8)
Pin 3 & 6
9
18
20
µA
2.5
5
6
100
nA/˚C
0.01
2.0
µA
3.6
TC IOFF
RIN
CIN
IVG
TC IVG
R VG
C VG
VOUT
Offset Current Drift
Input Resistance
Input Capacitance
VG Bias Current
VG Bias Drift
VG Input Resistance
VG Input Capacitance
Output Voltage Range
(Note 8)
Pin 3 & 6
Pin 3 & 6
Pin 2, VG = 0V(Note 7)
Pin 2(Note 8)
Pin 2
Pin 2
RL = 100Ω
RL = Open
±3.00
±2.95
±3.95
±3.82
5
750
5
−300
20
10
1.3
±3.20
±4.00
nA/˚C
kΩ
pF
µA
nA/˚C
kΩ
pF
V
ROUT
IOUT
VO
OFFSET
Output Impedance
Output Current
Output Offset Voltage
DC
VOUT = ±4V from Rails
0V < VG < 2V
0.1
Ω
±80
±90
mA
±75
±80
±300
mV
±380
+PSRR +Power Supply Rejection Ratio
Input Referred, 1V change,
−69
−47
dB
−PSRR
CMRR
IS
(Note 10)
−Power Supply Rejection Ratio
(Note 10)
Common Mode Rejection Ratio
(Note 9)
Supply Current
VG = 2.2V
Input Referred, 1V change,
VG = 2.2V
Input Referred,VG = 2V
−1.8V < VCM < 1.8V
No Load
VS = ±2.5V, RL= Open
−45
−58
−41
dB
−40
−72
dB
27
38
41
mA
9.3
16
19
3
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