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LMH6502 Datasheet, PDF (16/19 Pages) National Semiconductor (TI) – Wideband, Low Power, Linear-in-dB Variable Gain Amplifier
Application Information (Continued)
National Semiconductor suggests the following evaluation
boards as a guide for high frequency layout and as an aid in
device testing and characterization:
Device
Package
LMH6502MA
LMH6502MT
SOIC-14
TSSOP-14
Evaluation Board
Part Number
CLC730033
CLC730146
The evaluation board is shipped when a device sample
request is placed with National Semiconductor
SINGLE SUPPLY OPERATION
It is possible to operate the LMH6502 with a single supply. To
do so, tie pin 11 (GND) to a potential about mid point
between V+ and V−. Two examples are shown in Figure 4 &
Figure 5.
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FIGURE 4. AC Coupled Single Supply VGA
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FIGURE 5. Transformer Coupled Single Supply VGA
OPERATING AT LOWER SUPPLY VOLTAGES
The LMH6502 is rated for operation down to 5V supplies (V+
-V−). There are some specifications shown for operation at
±2.5V within the data sheet (i.e. Frequency Response,
CMRR, PSRR, Gain vs. VG, etc.). Compared to ±5V opera-
tion, at lower supplies:
a) VG range shifts lower.
Here are the approximate expressions for various VG
voltages as a function of V+:
TABLE 1. VG Definition Based on V+
VG
VG_MIN
VG_MID
VG_MAX
Definition
Gain Cut-off
AVMAX/2
AVMAX
Expression (V)
0.2 x V+ −1
0.2 x V+
0.2 x V+ +1
b) VG_LIMIT (maximum permissible voltage on VG) is re-
duced. This is due to limitations within the device arising
from transistor headroom. Beyond this limit, device per-
formance will be affected (non-destructive). This could
reveal itself as premature high frequency response roll-
off. With ±2.5V supplies, VG_LIMIT is below 1.1V whereas
VG = 1.5V is needed to get maximum gain. This means
that operating under these conditions has reduced the
maximum permissible voltage on VG to a level below
what is needed to get Max gain. If supply voltages are
asymmetrical with V+ being lower, further "pinching" of
VG range could result; for example, with V+ = 2V, and V−
= −3V, VG_LIMIT = 0.40V which results in maximum gain
being 2.5dB less than what would be expected when VS
is higher.
c) "Max_gain" reduces. There is an intrinsic reduction in
max gain when the total supply voltage is reduced (see
Typical Performance Characteristics plots for Gain vs. VG
(VS = ±2.5V). In addition, there is the more drastic
mechanism described in "b" above. Beyond VG_LIMIT,
high frequency response is also effected.
Application Circuits
AGC LOOP
Figure 6 shows a typical AGC circuit. The LMH6502 is
followed up with a LMH6714 for higher overall gain. The
output of the LMH6714 is rectified and fed to an inverting
integrator using a LMH6657 (wideband voltage feedback op
amp). When the output voltage, VOUT, is too large the inte-
grator output voltage ramps down reducing the net gain of
the LMH6502 and VOUT. If the output voltage is too small,
the integrator ramps up increasing the net gain and the
output voltage. Actual output level is set with R1. To prevent
shifts in DC output voltage with DC changes in input signal
level, trim pot R2 is provided. AGC circuits are always limited
in the range of input signals over which constant output level
can be maintained. In this circuit, we would expect that
reasonable AGC action could be maintained for at least
40dB. In practice, rectifier dynamic range limits reduce this
slightly.
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