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CP3CN23 Datasheet, PDF (3/246 Pages) National Semiconductor (TI) – CP3CN23 Reprogrammable Connectivity Processor with Dual CAN Interfaces | |||
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2.0 Features
CPU Features
 Fully static RISC processor core, capable of operating
from 0 to 24 MHz with zero wait/hold states
 Minimum 41.7 ns instruction cycle time with a 24-MHz in-
ternal clock frequency, based on a 12-MHz external input
 47 independently vectored peripheral interrupts
On-Chip Memory
 256K bytes reprogrammable Flash program memory
 8K bytes Flash data memory
 32K bytes of static RAM data memory
 Addresses up to 12M bytes of external memory
Broad Range of Hardware Communications Peripherals
 ACCESS.bus serial bus (compatible with Philips I2C bus)
 Dual CAN interface with 15 message buffers conforming
to CAN specification 2.0B active
 8/16-bit SPI, Microwire/Plus serial interface
 Four-channel Universal Asynchronous Receiver/Trans-
mitter (UART), one channel has USART capability
 Advanced Audio Interface (AAI) to connect to external 8/
13-bit PCM Codecs as well as to ISDN-Controllers
through the IOM-2 interface (slave only)
 CVSD/PCM converter supporting one bidirectional audio
connection
General-Purpose Hardware Peripherals
 12-bit A/D Converter (ADC)
 Dual 16-bit Multi-Function Timer (MFT)
 Versatile Timer Unit with four subsystems (VTU)
 Four-channel DMA controller
 Timing and Watchdog Unit
 Random Number Generator peripheral
Extensive Power and Clock Management Support
 On-chip Phase Locked Loop
 Support for multiple clock options
 Dual clock and reset
 Power-down modes
Flexible I/O
 Up to 56 general-purpose I/O pins (shared with on-chip
peripheral I/O)
 Programmable I/O pin characteristics: TRI-STATE out-
put, push-pull output, weak pull-up input, high-imped-
ance input
 Schmitt triggers on general-purpose inputs
 Multi-Input Wake-Up (MIWU) capability
Power Supply
 I/O port operation at 2.5V to 3.3V
 Core logic operation at 2.5V
 On-chip power-on reset
Temperature Range
 -40°C to +85°C (Industrial)
Packages
 LQFP-128, LQFP-144
Complete Development Environment
 Pre-integrated hardware and software support for rapid
prototyping and production
 Integrated environment
 Project manager
 Multi-file C source editor
 High-level C source debugger
 Comprehensive, integrated, one-stop technical support
CP3CN23 Connectivity Processor Selection Guide
NSID
Speed
(MHz)
Temp. Range
Program
Flash
(Kbytes)
Data
Flash
(Kbytes)
SRAM
(Kbytes)
External
Address
Lines
I/Os
Package
Type
CP3CN23G18NEP
24 -40° to +85°C 256
8
32
0
56
CP3CN23G18NEPNOPB 24 -40° to +85°C 256
8
32
0
56
CP3CN23G18NEPX
24 -40° to +85°C 256
8
32
0
56
CP3CN23G18NEPXNOPB 24 -40° to +85°C 256
8
32
0
56
CP3CN23Y98NEP
24 -40° to +85°C 256
8
32
23
50
CP3CN23Y98NEPNOPB
24 -40° to +85°C 256
8
32
23
50
CP3CN23Y98NEPX
24 -40° to +85°C 256
8
32
23
50
CP3CN23Y98NEPXNOPB 24 -40° to +85°C 256
8
32
23
50
NEP - Erased part (serial number in Information Block 1); X - Tape and reel; NOPB - No lead solder
LQFP-128
LQFP-128
LQFP-128
LQFP-128
LQFP-144
LQFP-144
LQFP-144
LQFP-144
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