THS4211 Datasheet, PDF (23/50 Pages) Texas Instruments – LOW-DISTORTION HIGH-SPEED VOLTAGE FEEDBACK AMPLIFIER

THS4211
THS4215
www.ti.com ................................................................................................................................... SLOS400E – SEPTEMBER 2002 – REVISED SEPTEMBER 2009
Using the THS4211 as a DAC Output Buffer
Two example circuits are presented here showing the
THS4211 buffering the output of a digital-to-analog
converter. The first circuit (Figure 80) performs a
differential to single-ended conversion with the
THS4211 configured as a difference amplifier. The
difference amplifier can double as the termination
mechanism for the DAC outputs as well.
Active Filtering with the THS4211
High-frequency active filtering with the THS4211 is
achievable due to the amplifier's high slew-rate, wide
bandwidth, and voltage feedback architecture.
Several options are available for high-pass, low-pass,
bandpass, and bandstop filters of varying orders. A
simple two-pole low pass filter is presented in
Figure 82 as an example, with two poles at 100 MHz.
3.3 V 3.3 V
100 Ω
100 Ω
DAC5675
14-Bit,
400 MSps
392 Ω
196 Ω
392 Ω
392 Ω
+5 V
_
THS4211
+
-5 V
392 Ω
49.9 Ω
RF
LO
50 Ω Source
V_I
392 Ω
57.6 Ω
3.9 pF
392 Ω
5V
_
THS4211
+
-5 V
49.9 Ω
V_O
33 pF
Figure 80. Differential to Single-Ended
Conversion of a High-Speed DAC Output
For cases where a differential signaling path is
desirable, a pair of THS4211 amplifiers can be used
as output buffers. The circuit in Figure 81 depicts a
differential drive into a mixer's IF inputs, coupled with
additional signal gain and filtering.
3.3 V 3.3 V
100 Ω
100 Ω
1 nF
THS4211
+
_
C_F
DAC5675
14-Bit,
400 MSps
392 Ω
100 Ω
392 Ω
392 Ω
392 Ω
1 nF
_
C_F
1 nF
IF+
49.9 Ω
49.9 Ω
RF_(out)
IF-
1 nF
+
THS4211
Figure 81. Differential Mixer Drive Circuit
Using the DAC5675 and the THS4211
space
space
space
Figure 82. A Two-Pole Active Filter With
Two Poles Between 90 MHz and 100 MHz
A Low-Noise Receiver with the THS4211
A combination of two THS4211 amplifiers can create
a high-speed, low-distortion, low-noise differential
receiver circuit as depicted in Figure 83. With both
amplifiers operating in the noninverting mode of
operation, the circuit presents a high load impedance
to the source. The designer has the option of
controlling the impedance through termination
resistors if a matched termination impedance is
desired.
100 Ω
V_I+
+
_
49.9 Ω
V_O+
392 Ω
787 Ω
392 Ω
100 Ω
_
100 Ω
V_I-
+
49.9 Ω
V_O-
Figure 83. A High Input Impedance, Low-Noise,
Differential Receiver
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