LMH6321 Datasheet, PDF (19/21 Pages) National Semiconductor (TI) – 300 mA High Speed Buffer with Adjustable Current Limit

Application Hints (Continued)
resistor the lower the voltage will be at this pin under thermal
shutdown. Table 3 shows some typical values of V_EF for 10
kΩ and 100 kΩ.
TABLE 3. V_EF vs. R₂ Figure 2
R₂
@ V⁺ = 5V
@V⁺ = 15V
10 kΩ
0.24V
0.55V
100 KΩ
0.036V
0.072V
SINGLE SUPPLY OPERATION
If dual supplies are used, then the GND pin can be con-
nected to a hard ground (0V) (as shown in Figure 2). How-
ever, if only a single supply is used, this pin must be set to a
voltage of one V_BE (∼0.7V) or greater, or more commonly,
mid rail, by a stiff, low impedance source. This precludes
applying a resistive voltage divider to the GND pin for this
purpose. Figure 6 shows one way that this can be done.
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FIGURE 6. Using an Op Amp to Bias the GND Pin to ¹â„2
V⁺ for Single Supply Operation
In Figure 6, the op amp circuit pre-biases the GND pin of the
buffer for single supply operation.
The GND pin can be driven by an op amp configured as a
constant voltage source, with the output voltage set by the
resistor voltage divider, R₁ and R₂. It is recommended that
These resistors be chosen so as to set the GND pin to V⁺/2,
for maximum common mode range.
SLEW RATE
Slew rate is the rate of change of output voltage for large-
signal step input changes. For resistive load, slew rate is
limited by internal circuit capacitance and operating current
(in general, the higher the operating current for a given
internal capacitance, the faster is the slew rate). Figure 7
shows the slew capabilities of the LMH6321 under large
signal input conditions, using a resistive load.
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FIGURE 7. Slew Rate vs. Peak-to-Peak Input Voltage
However, when driving capacitive loads, the slew rate may
be limited by the available peak output current according to
the following expression.
dv/dt = I_PK/C_L
(10)
and rapidly changing output voltages will require large output
load currents. For example if the part is required to slew at
1000 V/µs with a load capacitance of 1 nF the current
demand from the LMH6321 would be 1A. Therefore, fast
slew rate is incompatible with large C_L. Also, since C_L is in
parallel with the load, the peak current available to the load
decreases as C_L increases.
Figure 8 illustrates the effect of the load capacitance on slew
rate. Slew rate tests are specified for resistive loads and/or
very small capacitive loads, otherwise the slew rate test
would be a measure of the available output current. For the
highest slew rate, it is obvious that stray load capacitance
should be minimized. Peak output current should be kept
below 500 mA. This translates to a maximum stray capaci-
tance of 500 pF for a slew rate of 1000 V/µs.
20138636
FIGURE 8. Slew Rate vs. Load Capacitance
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