COP424C Datasheet, PDF (18/24 Pages) National Semiconductor (TI) – Single-Chip 1k and 2k CMOS Microcontrollers

Power Dissipation (Continued)
If an IT instruction is executed the chip goes into the IDLE
mode until the timer overflows In IDLE mode the current
drain can be calculated from the following equation
IcieI_QaVc40cFi
For example at 5 volts V_CC and 400 kHz
Icie20a5c40c0 4e100 mA
The total average current will then be the weighted average
of the operating current and the idle current
To
Ti
Ita e I_CO c _ToaTi a Ici c _ToaTi
where
Itaetotal average current
I_COeoperating current
Icieidle current
Toeoperating time
Tieidle time
I O OPTIONS
Outputs have the following optional configurations illustrat-
ed in Figure 11
a Standard A CMOS push-pull buffer with an N-channel
device to ground in conjunction with a P-channel device
to V_CC compatible with CMOS and LSTTL
b Low Current This is the same configuration as a
above except that the sourcing current is much less
c Open Drain An N-channel device to ground only allow-
ing external pull-up as required by the user’s application
d Standard TRI-STATE L Output A CMOS output buffer
similar to a which may be disabled by program control
e Low-Current TRI-STATE L Output This is the same as
d above except that the sourcing current is much less
f Open-Drain TRI-STATE L Output This has the N-chan-
nel device to ground only
All inputs have the following options
g Input with on chip load device to V_CC
h Hi-Z input which must be driven by the users logic
When using either the G or L I O ports as inputs a pull-up
device is necessary This can be an external device or the
following alternative is available Select the low-current out-
put option Now by setting the output registers to a logic
‘‘1’’ level the P-channel devices will act as the pull-up load
Note that when using the L ports in this fashion the Q regis-
ters must be set to a logic ‘‘1’’ level and the L drivers MUST
BE ENABLED by an LEI instruction (see description above)
All output drivers use one or more of three common devices
numbered 1 to 3 Minimum and maximum current (I_OUT and
V_OUT) curves are given in Figure 12 for each of these de-
vices to allow the designer to effectively use these I O con-
figurations
a Standard Push-Pull Output
b Low Current Push-Pull Output
c Open-Drain Output
d Standard TRI-STATE ‘‘L’’ Output
e Low Current TRI-STATE
‘‘L’’ Output
f Open Drain TRI-STATE
‘‘L’’ Output
g Input with Load
h Hi-Z Input
FIGURE 11 Input Output Configurations
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