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COP424C Datasheet, PDF (13/24 Pages) National Semiconductor (TI) – Single-Chip 1k and 2k CMOS Microcontrollers
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Instruction Set
Table II is a symbol table providing internal architecture in-
struction operan and operation symbols used in the instruc-
tion set table
TABLE II Instruction Set Table Symbols
Symbol Definition
Internal Architecture Symbols
A
4-bit accumulator
B
7-bit RAM address register (6-bit for COP424C)
Br
Upper 3 bits of B (register address)
(2-bit for COP424C)
Bd
Lower 4 bits of B (digit address)
C
1-bit carry register
D
4-bit data output port
EN
4-bit enable register
G
4-bit general purpose I O port
IL
two 1-bit (IN0 and IN3) latches
IN
4-bit input port
L
8-bit TRI-STATE I O port
M
4-bit contents of RAM addressed by B
PC
11-bit ROM address program counter
Q
8-bit latch for L port
SA SB SC 11-bit 3-level subroutine stack
SIO
4-bit shift register and counter
SK
Logic-controlled clock output
SKL
1-bit latch for SK output
T
8-bit timer
Table III provides the mnemonic operand machine code
data flow skip conditions and description of each instruc-
tion
Instruction Operand Symbols
d
4-bit operand field 0 – 15 binary (RAM digit select)
r
3(2)-bit operand field 0 – 7(3) binary
(RAM register select)
a
11-bit operand field 0 – 2047 (1023)
y
4-bit operand field 0 – 15 (immediate data)
RAM(x) RAM addressed by variable x
ROM(x) ROM addressed by variable x
Operational Symbols
a
Plus
b
Minus
x Replaces
Is exchanged with
e
Is equal to
A
One’s complement of A
Z
Exclusive-or
Range of values
Mnemonic
Operand
Hex
Code
ARITHMETIC INSTRUCTIONS
ASC
30
ADD
ADT
AISC
31
4A
y
5b
CASC
10
CLRA
00
COMP
40
NOP
44
RC
32
SC
22
XOR
02
TABLE III COP444C 445C Instruction Set
Machine
Language
Code
(Binary)
Data Flow
Skip
Conditions
Description
0011 0000
0011 0001
0100 1010
0101 y
x AaCaRAM(B) A
CarryxC
x AaRAM(B) A
x Aa1010 A
AayxA
Carry
None
None
Carry
0001 0000
0000 0000
0100 0000
0100 0100
0011 0010
0010 0010
0000 0010
x AaRAM(B)aC A
CarryxC
0xA
AxA
None
‘‘0’’xC
‘‘1’’xC
x A Z RAM(B) A
Carry
None
None
None
None
None
None
Add with Carry Skip on
Carry
Add RAM to A
Add Ten to A
Add Immediate Skip on
Carry (y i 0)
Complement and Add with
Carry Skip on Carry
Clear A
Ones complement of A to A
No Operation
Reset C
Set C
Exclusive-OR RAM with A
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