LMH6550_14 Datasheet, PDF (17/25 Pages) National Semiconductor (TI) – LMH6550 Differential, High Speed Op Amp

LMH6550
www.ti.com
SNOSAK0H – DECEMBER 2004 – REVISED MARCH 2013
1. Calculate the quiescent (no-load) power: P_AMP = I_CC* (V_S), where V_S = V⁺ - V^−. (Be sure to include any
current through the feedback network if V_OCM is not mid rail.)
2. Calculate the RMS power dissipated in each of the output stages: P_D (rms) = rms ((V_S - V^+OUT) * I^+OUT) + rms
((V_S − V^−_OUT) * I^−_OUT), where V_OUT and I_OUT are the voltage and the current measured at the output pins of
the differential amplifier as if they were single ended amplifiers and V_S is the total supply voltage.
3. Calculate the total RMS power: P_T = P_AMP + P_D.
The maximum power that the LMH6550 package can dissipate at a given temperature can be derived with the
following equation:
P_MAX = (150° – T_AMB)/ θ_JA
where
• T_AMB = Ambient temperature (°C)
• θ_JA = Thermal resistance, from junction to ambient, for a given package (°C/W)
• For the SOIC package θ_JA is 150°C/W
• For the VSSOP package θ_JA is 235°C/W
(1)
NOTE
If V_CM is not 0V then there will be quiescent current flowing in the feedback network. This
current should be included in the thermal calculations and added into the quiescent power
dissipation of the amplifier.
ESD PROTECTION
The LMH6550 is protected against electrostatic discharge (ESD) on all pins. The LMH6550 will survive 2000V
Human Body model and 200V Machine model events. Under normal operation the ESD diodes have no effect on
circuit performance. There are occasions, however, when the ESD diodes will be evident. If the LMH6550 is
driven by a large signal while the device is powered down the ESD diodes will conduct. The current that flows
through the ESD diodes will either exit the chip through the supply pins or will flow through the device, hence it is
possible to power up a chip with a large signal applied to the input pins. Using the shutdown mode is one way to
conserve power and still prevent unexpected operation.
BOARD LAYOUT
The LMH6550 is a very high performance amplifier. In order to get maximum benefit from the differential circuit
architecture board layout and component selection is very critical. The circuit board should have low a
inductance ground plane and well bypassed broad supply lines. External components should be leadless surface
mount types. The feedback network and output matching resistors should be composed of short traces and
precision resistors (0.1%). The output matching resistors should be placed within 3-4 mm of the amplifier as
should the supply bypass capacitors. The LMH730154 evaluation board is an example of good layout
techniques.
The LMH6550 is sensitive to parasitic capacitances on the amplifier inputs and to a lesser extent on the outputs
as well. Ground and power plane metal should be removed from beneath the amplifier and from beneath R_F and
R_G.
With any differential signal path symmetry is very important. Even small amounts of asymmetry will contribute to
distortion and balance errors.
EVALUATION BOARD
National Semiconductor offers evaluation board(s) to aid in device testing and characterization and as a guide for
proper layout. Generally, a good high frequency layout will keep power supply and ground traces away from the
inverting input and output pins. Parasitic capacitances on these nodes to ground will cause frequency response
peaking and possible circuit oscillations (see Application Note OA-15 for more information).
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