LMH6550_14 Datasheet, PDF (14/25 Pages) National Semiconductor (TI) – LMH6550 Differential, High Speed Op Amp

LMH6550
SNOSAK0H – DECEMBER 2004 – REVISED MARCH 2013
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R_F
R_O
R_S
a ^VI
R_G
R_T ^VCM
R_G
R_M
V_I1
+
-
V_I2
V_O1
C_L R_L V_O
V_O2
R_O
R_F
ENABLE
V_O1 + V_O2
*V_CM =
2
*BY DESIGN
V_ICM = V_OCM
V_I1 + V_I2
V_ICM =
2
Figure 30. AC Coupled for Single Supply Operation
DRIVING ANALOG TO DIGITAL CONVERTERS
Analog to digital converters (ADC) present challenging load conditions. They typically have high impedance
inputs with large and often variable capacitive components. As well, there are usually current spikes associated
with switched capacitor or sample and hold circuits. Figure 31 shows a typical circuit for driving an ADC. The two
56Ω resistors serve to isolate the capacitive loading of the ADC from the amplifier and ensure stability. In
addition, the resistors form part of a low pass filter which helps to provide anti alias and noise reduction
functions. The two 39 pF capacitors help to smooth the current spikes associated with the internal switching
circuits of the ADC and also are a key component in the low pass filtering of the ADC input. In the circuit of
Figure 31 the cutoff frequency of the filter is 1/ (2*π*56Ω *(39 pF + 14 pF)) = 53 MHz (which is slightly less than
the sampling frequency). Note that the ADC input capacitance must be factored into the frequency response of
the input filter, and that being a differential input the effective input capacitance is double. Also as shown in
Figure 31 the input capacitance to many ADCs is variable based on the clock cycle. See the data sheet for your
particular ADC for details.
R_G1
a ^VI
R_G2
R_F1
56
+
V_CM
-
39 pF
39 pF
ADC12LO66
7 - 8 pF
56
R_F2
V_REF
ENABLE
1V LOW IMPEDANCE
VOLTAGE REFERENCE
Figure 31. Driving an ADC
14
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