LMH6505 Datasheet, PDF (15/20 Pages) National Semiconductor (TI) – Wideband, Low Power, Linear-in-dB, Variable Gain Amplifier

Application Information (Continued)
FIGURE 6. Transmission Line Matching
20171056
The resistors R_S, R_I, R_O, and R_T are equal to the character-
istic impedance, Z_O, of the transmission line or cable. Use
C_O to match the output transmission line over a greater
frequency range. It compensates for the increase of the op
amp’s output impedance with frequency.
MINIMIZING PARASITIC EFFECTS ON SMALL SIGNAL
BANDWIDTH
The best way to minimize parasitic effects is to use surface
mount components and to minimize lead lengths and com-
ponent distance from the LMH6505. For designs utilizing
through-hole components, specifically axial resistors, resis-
tor self-capacitance should be considered. For example, the
average magnitude of parasitic capacitance of RN55D 1%
metal film resistors is about 0.15 pF with variations of as
much as 0.1 pF between lots. Given the LMH6505’s ex-
tended bandwidth, these small parasitic reactance variations
can cause measurable frequency response variations in the
highest octave. We therefore recommend the use of surface
mount resistors to minimize these parasitic reactance ef-
fects.
RECOMMENDATIONS
Here are some recommendations to avoid problems and to
get the best performance:
• Do not place a capacitor across R_F. However, an appro-
priately chosen series RC combination can be used to
shape the frequency response.
• Keep traces connecting R_F separated and as short as
possible.
• Place a small resistor (20-50Ω) between the output and
C_L.
• Cut away the ground plane, if any, under R_G.
• Keep decoupling capacitors as close as possible to the
LMH6505.
• Connect pin 2 through a minimum resistance of 25Ω.
ADJUSTING OFFSETS AND DC LEVEL SHIFTING
Offsets can be broken into two parts: an input-referred term
and an output-referred term. These errors can be trimmed
using the circuit in Figure 7. First set V_G to 0V and adjust the
trim pot R₄ to null the offset voltage at the output. This will
eliminate the output stage offsets. Next set V_G to 2V and
adjust the trim pot R₁ to null the offset voltage at the output.
This will eliminate the input stage offsets.
FIGURE 7. Offset Adjust Circuit
20171057
DIGITAL GAIN CONTROL
Digitally variable gain control can be easily realized by driv-
ing the LMH6505 gain control input with a digital-to-analog
converter (DAC). Figure 8 illustrates such an application.
This circuit employs National Semiconductor’s eight-bit
DAC0830, the LMC8101 MOS input op amp (Rail-to-Rail
Input/Output), and the LMH6505 VGA. With V_REF set to 2V,
the circuit provides up to 80 dB of gain control in 256 steps
with up to 0.05% full scale resolution. The maximum gain of
this circuit is 20 dB.
15
www.national.com