DS90CR213 Datasheet, PDF (12/14 Pages) National Semiconductor (TI) – 21-Bit Channel Link─66 MHz

Applications Information (Continued)
POWER SEQUENCING AND POWERDOWN MODE: Out-
puts of the CHANNEL LINK transmitter remain in TRI-STATE
until the power supply reaches 3V. Clock and data outputs
will begin to toggle 10 ms after V_CC has reached 4.5V and
the Powerdown pin is above 2V. Either device may be placed
into a powerdown mode at any time by asserting the Power-
down pin (active low). Total power dissipation for each de-
vice will decrease to 5 µW (typical).
The CHANNEL LINK chipset is designed to protect itself
from accidental loss of power to either the transmitter or re-
ceiver. If power to the transmit board is lost, the receiver
clocks (input and output) stop. The data outputs (RxOUT) re-
tain the states they were in when the clocks stopped. When
the receiver board loses power, the receiver inputs are
shorted to V _CC through an internal diode. Current is limited
(5 mA per input) by the fixed current mode drivers, thus
avoiding the potential for latchup when powering the device.
FIGURE 20. Single-Ended and Differential Waveforms
DS012888-26
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Extract
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PrintDate=1998/01/07 PrintTime=09:53:22 28561 ds012888 Rev. No. 5 cmserv Proof
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