DS90C385 Datasheet, PDF (12/17 Pages) National Semiconductor (TI) – +3.3V Programmable LVDS Transmitter 24-Bit Flat Panel Display (FPD) Link-85 MHz, +3.3V Programmable LVDS Transmitter 18-Bit Flat Panel Display (FPD) L

DS90C385SLC SLC64A (FBGA) Package Pin Summary —
FPD Link Transmitter
Pin Name
TxIN
TxOUT+
TxOUT−
TxCLKIN
R_FB
TxCLK OUT+
TxCLK OUT−
PWR DOWN
V_CC
GND
PLL V_CC
PLL GND
LVDS V_CC
LVDS GND
NC
I/O No.
Description
I
28 TTL level input.
O
4 Positive LVDS differential data output.
O
4 Negative LVDS differential data output.
I
1 TTL IeveI clock input. The rising edge acts as data strobe. Pin name TxCLK IN.
I
1 Programmable strobe select. HIGH = rising edge, LOW = falling edge.
O
1 Positive LVDS differential clock output.
O
1 Negative LVDS differential clock output.
I
1 TTL level input. Assertion (low input) TRI-STATES the outputs, ensuring low current at
power down. See Applications Information section.
I
3 Power supply pins for TTL inputs.
I
5 Ground pins for TTL inputs.
I
1 Power supply pin for PLL.
I
2 Ground pins for PLL.
I
2 Power supply pin for LVDS outputs.
I
4 Ground pins for LVDS outputs.
6 Pins not connected.
DS90C385SLC SLC64A (FBGA) Package Pin Description —
FPD Link Transmitter
By Pin
Pin
Pin Name
Type
A1
TxIN27
I
A2
TxOUT0-
O
A3
TxOUT0+
O
A4
LVDS VCC
P
A5
LVDS VCC
P
A6
TxCLKOUT-
O
A7
TxCLKOUT+
O
A8
TxOUT3+
O
B1
TxIN1
I
B2
TxIN0
I
B3
LVDS GND
G
B4
LVDS GND
G
B5
TxOUT2-
O
B6
TxOUT3-
O
B7
LVDS GND
G
B8
NC
C1
TxIN3
I
C2
NC
C3
NC
C4
TxOUT1-
O
C5
TxOUT2+
O
C6
PLL GND
G
C7
PLL VCC
P
C8
TxCLKIN
I
D1
TxIN4
I
D2
TxIN2
I
D3
GND
G
By Pin Type
Pin
Pin Name
D3
GND
E4
GND
E8
GND
G1
GND
G6
GND
B3
LVDS GND
B4
LVDS GND
B7
LVDS GND
D5
LVDS GND
C6
PLL GND
D6
PLL GND
D7
PWR DOWN
G5
R_FB
C8
TxCLKIN
B2
TxIN0
B1
TxIN1
D2
TxIN2
C1
TxIN3
D1
TxIN4
F1
TxIN5
E2
TxIN6
E3
TxIN7
G2
TxIN8
H1
TxIN9
G3
TxIN10
H3
TxIN11
F4
TxIN12
Type
G
G
G
G
G
G
G
G
G
G
G
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
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