LMH6628EP Datasheet, PDF (11/16 Pages) National Semiconductor (TI) – Enhanced Plastic Dual Wideband, Low Noise, Voltage Feedback Op Amp

(SOIC) dual op amp evaluation board as a guide for high fre-
quency layout and as an aid in device evaluation.
ANALOG DELAY CIRCUIT (ALL-PASS NETWORK)
The circuit in Figure 1 implements an all-pass network using
the LMH6628EP. A wide bandwidth buffer (LM7121) drives
the circuit and provides a high input impedance for the source.
As shown in Figure 2, the circuit provides a 13.1ns delay (with
R = 40.2Ω, C = 47pF). R_F and R_G should be of equal and low
value for parasitic insensitive operation.
FIGURE 1.
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In the circuit shown in Figure 3, one of the LMH6628EP's
amps is used as a "driver" and the other as a difference "re-
ceiver" amplifier. The output impedance of the "driver" is
essentially zero. The two R's are chosen to match the char-
acteristic impedance of the transmission line. The "driver" op
amp gain can be selected for unity or greater.
Receiver amplifier A₂ (B₂) is connected across R and forms
differential amplifier for the signals transmitted by driver A₂
(B₂). If R_F equals R_G, receiver A₂ (B₁) will then reject the sig-
nals from driver A₁ (B₁) and pass the signals from driver B₁
(A₁).
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FIGURE 2. Delay Circuit Response to 0.5V Pulse
The circuit gain is +1 and the delay is determined by the fol-
lowing equations.
(1)
(2)
where T_d is the delay of the op amp at A_V = +1.
The LMH6628EP provides a typical delay of 2.8ns at its −3dB
point.
FULL DUPLEX DIGITAL OR ANALOG TRANSMISSION
Simultaneous transmission and reception of analog or digital
signals over a single coaxial cable or twisted-pair line can re-
duce cabling requirements. The LMH6628EP's wide band-
width and high common-mode rejection in a differential
amplifier configuration allows full duplex transmission of
video, telephone, control and audio signals.
FIGURE 3.
The output of the receiver amplifier will be:
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(3)
Care must be given to layout and component placement to
maintain a high frequency common-mode rejection. The plot
of Figure 4 shows the simultaneous reception of signals trans-
mitted at 1MHz and 10MHz.
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200886 Version 4 Revision 2 Print Date/Time: 2010/10/15 15:22:20
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