DS92CK16_06 Datasheet, PDF (10/12 Pages) National Semiconductor (TI) – 3V BLVDS 1 to 6 Clock Buffer/Bus Transceiver

Applications Information
General application guidelines and hints for BLVDS/LVDS
transceivers, drivers and receivers may be found in the
following application notes: LVDS Owner’s Manual (lit
#550062-001), AN805, AN807, AN808, AN903, AN905,
AN916, AN971, AN977 .
BLVDS drivers and receivers are intended to be used in a
differential backplane configuration. Transceivers or receiv-
ers are connected to the driver through a balanced media
such as differential PCB traces. Typically, the characteristic
differential impedance of the media (Zo) is in the range of
50Ω to100Ω. Two termination resistors of ZoΩ each are
placed at the ends of the transmission line backplane. The
termination resistor converts the current sourced by the
driver into a voltage that is detected by the receiver. The
effects of mid-stream connector(s), cable stub(s), and other
impedance discontinuities as well as ground shifting, noise
margin limits, and total termination loading must be taken
into account.
The DS92CK16 differential line driver is a balanced current
source design. A current mode driver, generally speaking
has a high output impedance (100 ohms) and supplies a
constant current for a range of loads (a voltage mode driver
on the other hand supplies a constant voltage for a range of
loads). Current is switched through the load in one direction
to produce a logic state and in the other direction to produce
the other logic state. The output current is typically 9.330
mA. The current changes as a function of load resistor. The
current mode requires (as discussed above) that a resistive
termination be employed to terminate the signal and to com-
plete the loop. Unterminated configurations are not allowed.
The 9.33 mA loop current will develop a differential voltage of
about 350mV across 37.5Ω (double terminated 75Ω differ-
ential transmission backplane) effective resistance, which
the receiver detects with a 280 mV minimum differential
noise margin neglecting resistive line losses (driven signal
minus receiver threshold (350 mV – 70 mV = 280 mV)). The
signal is centered around +1.2V (Driver Offset, V_OS) with
respect to ground. Note that the steady-state voltage (V_SS)
peak-to-peak swing is twice the differential voltage (V_OD)
and is typically 700 mV.
The current mode driver provides substantial benefits over
voltage mode drivers, such as an RS-422 driver. Its quies-
cent current remains relatively flat versus switching fre-
quency. Whereas the RS-422 voltage mode driver increases
exponentially in most case between 20 MHz–50 MHz. This
is due to the overlap current that flows between the rails of
the device when the internal gates switch. Whereas the
current mode driver switches a fixed current between its
output without any substantial overlap current. This is similar
to some ECL and PECL devices, but without the heavy static
I_CC requirements of the ECL/PECL designs. LVDS requires
> 80% less current than similar PECL devices. AC specifi-
cations for the driver are a tenfold improvement over other
existing RS-422 drivers.
The TRI-STATE function allows the driver outputs to be
disabled, thus obtaining an even lower power state when the
transmission of data is not required.
POWER DECOUPLING RECOMMENDATIONS
Bypass capacitors must be used on power pins. High fre-
quency ceramic (surface mount is recommended) 0.1µF in
parallel with 0.01µF, in parallel with 0.001µF at the power
supply pin as well as scattered capacitors over the printed
circuit board. Multiple vias should be used to connect the
decoupling capacitors to the power planes. A 4.7µF (35V) or
greater solid tantalum capacitor should be connected at the
power entry point on the printed circuit board.
PC BOARD CONSIDERATIONS
Use at least 4 PCB layers (top to bottom); BLVDS signals,
ground, power, TTL signals.
Isolate TTL signals from BLVDS signals, otherwise the TTL
may couple onto the BLVDS lines. It is best to put TTL and
BLVDS signals on different layers which are isolated by a
power/ground plane(s).
Keep drivers and receivers as close to the (BLVDS port side)
connectors as possible to create short stub lengths.
DIFFERENTIAL TRACES
Use controlled impedance traces which match the differen-
tial impedance of your transmission medium (ie. backplane
or cable) and termination resistor(s). Run the differential pair
trace lines as close together as possible as soon as they
leave the IC . This will help eliminate reflections and ensure
noise is coupled as common-mode. In fact, we have seen
that differential signals which are 1mm apart radiate far less
noise than traces 3mm apart since magnetic field cancella-
tion is much better with the closer traces. Plus, noise in-
duced on the differential lines is much more likely to appear
as common-mode which is rejected by the receiver.
Match electrical lengths between traces to reduce skew.
Skew between the signals of a pair means a phase differ-
ence between signals which destroys the magnetic field
cancellation benefits of differential signals and EMI will re-
sult. (Note the velocity of propagation, v = c/Er where c (the
speed of light) = 0.2997mm/ps or 0.0118 in/ps). Do not rely
solely on the autoroute function for differential traces. Care-
fully review dimensions to match differential impedance and
provide isolation for the differential lines. Minimize the num-
ber or vias and other discontinuities on the line.
Avoid 90˚ turns (these cause impedance discontinuities).
Use arcs or 45˚ bevels.
Within a pair of traces, the distance between the two traces
should be minimized to maintain common-mode rejection of
the receivers. On the printed circuit board, this distance
should remain constant to avoid discontinuities in differential
impedance. Minor violations at connection points are allow-
able.
STUB LENGTH
Stub lengths should be kept to a minimum. The typical
transition time of the DS92CK16 BLVDS output is 0.75ns
(20% to 80%). The 100 percent time is 0.75/0.6 or 1.25ns.
For a general approximation, if the electrical length of a trace
is greater than 1/5 of the transition edge, then the trace is
considered a transmission line. For example, 1.25ns/5 is 250
picoseconds. Let velocity equal 160ps per inch for a typical
loaded backplane. Then maximum stub length is 250ps/
160ps/in or 1.56 inches. To determine the maximum stub for
your backplane, you need to know the propagation velocity
for the actual conditions (refer to application notes AN– 905
and AN–808).
TERMINATION
Use a resistor which best matches the differential impedance
of your loaded transmission line. Remember that the current
mode outputs need the termination resistor to generate the
differential voltage. BLVDS will not work without resistor
termination.
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