DS90LV804 Datasheet, PDF (1/6 Pages) National Semiconductor (TI) – 4-Channel 800 Mbps LVDS Buffer/Repeater

January 2006
DS90LV804
4-Channel 800 Mbps LVDS Buffer/Repeater
General Description
The DS90LV804 is a four channel 800 Mbps LVDS buffer/
repeater. In many large systems, signals are distributed
across cables and signal integrity is highly dependent on the
data rate, cable type, length, and the termination scheme. In
order to maximize signal integrity, the DS90LV804 features
both an internal input and output (source) termination to
eliminate these extra components from the board, and to
also place the terminations as close as possible to receiver
inputs and driver output. This is especially significant when
driving longer cables.
The DS90LV804, available in the LLP (Leadless Leadframe
Package) package, minimizes the footprint, and improves
system performance.
An output enable pin is provided, which allows the user to
place the LVDS outputs and internal biasing generators in a
TRI-STATE, low power mode.
The differential inputs interface to LVDS, and Bus LVDS
signals such as those on National’s 10-, 16-, and 18- bit Bus
LVDS SerDes, as well as CML and LVPECL. The differential
inputs are internally terminated with a 100Ω resistor to im-
prove performance and minimize board space. This function
function is especially useful for boosting signals over lossy
cables or point-to-point backplane configurations.
Features
n 800 Mbps data rate per channel
n Low output skew and jitter
n Hot plug protection
n LVDS/CML/LVPECL compatible input, LVDS output
n On-chip 100Ω input and output termination
n 15 kV ESD protection on LVDS Inputs and Outputs
n Single 3.3V supply
n Very low power consumption
n Industrial -40 to +85˚C temperature range
n Small LLP Package Footprint
Block and Connection Diagrams
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DS90LV804 Block Diagram
© 2006 National Semiconductor Corporation DS201567
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DS90LV804 LLP Pinout
(Top View)
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