SM9403BM Datasheet, PDF (16/18 Pages) Nippon Precision Circuits Inc – DVDRAM Servo-amplifier LSI

SM9403BM
Sample-and-Hold Control Signal Generator
This stage takes the OR-logic of the CAPIN and
CAPOUT signals, generated by the header position
detector, the CAPSEL and CAPSEEK input signals,
and the serial interface control bit HRE and uses
them to create a sample-and-hold circuit control sig-
nal SHCNT.
The SHCNT is then used in conjunction with serial
interface select bits FHE and THE to form the focus
sample-and-hold (FSHCNT) and tracking sample-
and-hold (TSHCNT) signals.
Table 12. Sample-and-hold logic
CAPIN
HIGH
×
LOW
HIGH
×
×
×
1. Default is LOW
× = don’t care.
CAPOUT
×
HIGH
LOW
×
HIGH
×
×
CAPSEL
×
×
×
×
×
HIGH
LOW
CAPSEEK
LOW
LOW
LOW
LOW
LOW
HIGH
HIGH
HRE¹
HIGH
HIGH
×
LOW
LOW
×
×
SHCNT
HIGH
HIGH
LOW
LOW
LOW
HIGH
LOW
Table 13. Sample-and-hold signal control logic
FHE¹
THE¹
FSHCNT²
TSHCNT²
LOW
×
LOW
×
×
LOW
×
LOW
HIGH
×
SHCNT
×
×
HIGH
×
SHCNT
1. Default is LOW
2. FSHCNT is the focus sample-and-hold control signal, and TSHCNT is
the tracking sample-and-hold control signal.
× = don’t care.
Tracking Error Signal Switching (SWA, SWB)
This stage performs tracking error signal switching playback. Switching is controlled by serial interface
during DVDRAM write/read and DVDROM and CD control bits.
Table 14. Tracking error signal select
SWA
LOW
HIGH
1. Default is S/H
SWB
LOW
HIGH
Tracking error
signal select¹
S/H
DPD
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