SM9403BM Datasheet, PDF (12/18 Pages) Nippon Precision Circuits Inc – DVDRAM Servo-amplifier LSI

SM9403BM
DPD Error Signal Detector (DPDA/DPDB/DPDC/DPDD → TRP)
This stage compares the DPD signals, passes the
comparator output through a low-pass filter to obtain
the DPD tracking error signal.
The phase comparator incorporates a detector func-
tion which prevents abnormal waveform signals get-
ting to the output by holding the output constant.
The DPD signals are first added, (DPDA + DPDC)
and (DPDB + DPDD), then passed to an equalizer. A
relative time delay is added for offset correction. The
signals are then converted to a pulse waveform by
comparators with hysteresis characteristics.
The phase comparator then compares the phase of
the pulse waveforms to obtain a time signal equiva-
lent to the tracking error. The time signal is then con-
verted to a voltage.
The converted voltage is passed to the output stage,
undergoes sampling timing compensation before
being integrated to generate the tracking error signal
output.
In addition, serial interface control bit DPE and input
DEFECT can be used to force the tracking error sig-
nal to the reference voltage VREF2. These controls
can be used when powering up a system or to prevent
output saturation from occurring during periods
when the input signal is unstable.
The relative time delay setting and time-to-voltage
conversion coefficient can be controlled using serial
interface control bits. Also, the equalizer used to
compensate for the previous stage can be turned ON
or OFF using serial interface control.
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