SM5841H Datasheet, PDF (13/20 Pages) Nippon Precision Circuits Inc – Audio Multi-function Digital Filter

SM5841H
Audio Data Input (DIN, BCKI, LRCI)
The input data is in 16/18-bit serial, 2s complement,
MSB first format.
Serial input data on DIN is clocked into an SIPO
(serial in, parallel out) register on the rising edge of
the BCKI bit clock, and then converted to parallel
data.
SIPO output data is transferred into the left and
right-channel input registers on the falling edge and
rising edge, respectively, of the LRCI clock.
The internal arithmetic operation and output circuit
timing is independent of the input timing. Accord-
ingly, phase differences between LRCI, BCKI and
CKI do not affect device operation, and any jitter in
the data input clock does not cause jitter in the output
clock.
Note that the device should be reset if either or both
of the LRCI and CKI clocks stop. If the device is not
reset, even though the clocks are low frequency,
incorrect circuit operation may occur, generating
unwanted output noise.
DIN
BCKI
LRCI
Lch ^MSB
16 / 18bit
1/fs
LSB
Rch
MSB
16 / 18bit
LSB
Figure 3. Audio data input timing
NIPPON PRECISION CIRCUITS—13