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SM5841H Datasheet, PDF (11/20 Pages) Nippon Precision Circuits Inc – Audio Multi-function Digital Filter | |||
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SM5841H
FUNCTIONAL DESCRIPTION
The basic arithmetic block is shown in ï¬gure 1, and
the function of each block is described in the follow-
ing sections.
Input
fs
Deemphasis IIR filter
fs
fs
Attenuator
fs
1st FIR
69th - order
2 Ã interpolator
2fs
2nd FIR
13th - order
2 Ã interpolator
4fs
3rd FIR
9th - order
2 Ã interpolator
8fs
Output
Figure 1. Arithmetic block diagram
8-times Oversampling (Interpolation)
Digital Deemphasis (DSF1, DSF2)
The interpolation arithmetic block is comprised of 3
cascaded, 2-times FIR interpolation ï¬lters, as shown
in ï¬gure 1.
The input signal is sampled at rate fs, and then 8-
times oversampling data is output. Sampling noise in
the 0.5465fs to 7.4535fs stopband is removed by the
interpolation ï¬lter.
The digital deemphasis ï¬lter has the same construc-
tion as analog ï¬lters. It is implemented as an IIR ï¬l-
ter to faithfully reproduce the gain and phase
characteristics of standard analog deemphasis ï¬lters.
The ï¬lter coefï¬cients for fs = 32.0/44.1/48.0 kHz
sampling frequency are selected by DSF1 and DSF2
when the sampling frequency is speciï¬ed, as shown
in the following table.
DSF1
LOW
LOW
HIGH
HIGH
DSF2
LOW
HIGH
LOW
HIGH
Deemphasis Sampling frequency
On
44.1 kHz
On
48.0 kHz
Off
â
On
32.0 kHz
NIPPON PRECISION CIRCUITSâ11
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