PXI-5404 Datasheet, PDF (2/6 Pages) National Instruments Corporation – 9 kHz to 105 MHz sine wave/DC to 100 MHz clock/1.07 μHz frequency resolution

100 MHz Frequency Generator
Programmable Clock Output Levels for TTL/CMOS
The PXI-5404 has programmable voltage output levels of 5, 3.3,
and 1.8 V into high impedance loads and 2.5, 1.65, and 0.9 V into
a 50 Ω load. With the flexible clock output levels, the PXI-5404 can
address both TTL and CMOS technologies thereby making it an
attractive clock source for ATE systems. Additionally an external
DC blocking capacitor can be used to shift the outputs to other
popular logic levels such as LVPECL and PECL.
Superior Leveled Sine Output Accuracy
The PXI-5404 employs an onboard amplitude-leveling
compensation scheme whereby the specified output level enjoys
excellent accuracy of ±0.2 dB within the passband of 9 kHz to
100 MHz. In Figures 2 and 3 the effects of the output leveling
technique can be seen clearly. This level accuracy makes the
PXI-5404 an ideal source for many applications such as
communications and ATE, where amplitude accuracy is a
key requirement.
10.6
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Frequency (MHz)
Figure 2. NI PXI-5404 Passband Flatness without Onboard Compensation
10.6
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Frequency (MHz)
Figure 3. NI PXI-5404 Passband Flatness with Onboard Compensation
Triggering
The sine and clock outputs can run continuously or you can use
triggering controls to start sine and clock generation. Trigger
sources can be either external or internal (software trigger).
External triggers can be received from the front panel connector
PFI0, the PXI trigger bus, or the PXI star trigger bus. You can also
change the operating frequency, amplitude, and phase of the
PXI-5404 output from one of these sources.
Calibration
Every PXI-5404 is factory calibrated and shipped with a calibration
certificate verifying that it meets NIST-traceable standards.
Periodically, you can externally calibrate the PXI-5404 (provided
you have the expertise and equipment), or you can ship it to
National Instruments or a qualified metrology lab.
External calibration is usually performed on an annual
basis. Visit ni.com/calibration for more information about
calibration services.
Phase-Lock Loop for Synchronization
The phase-lock loop on the PXI-5404 synchronizes sine and clock
generation to an external clock. The reference clock source may
come from the front panel connector CLK IN, the PXI 10 MHz
reference clock on the PXI backplane, or the PXI trigger bus.
The PXI-5404 phase-locks to frequencies from 3 to 20 MHz in
1 MHz increments. The PXI-5404 can also operate without an
external reference frequency by using its onboard
frequency source.
Using phase-lock loops, you can synchronize two or more
PXI-5404 sources to within 0.022 deg in phase for outputs up to
100 MHz. Consequently, you can build a high-performance
multichannel source on the PXI platform. Thus, with the PXI-5404
you can address applications such as in automotive and video test
that require multiple clock frequencies that are phase locked in
precise phase relationships.
I/O Connector
The PXI-5404 has five SMB connectors labeled SINE, CLOCK,
REF IN, REF OUT, and PFI0. The sine and clock outputs are
accessed on SINE and CLOCK, respectively, and an external
reference frequency for the phase-lock loop is fed to the REF IN
connector. The REF OUT connector is a truly versatile output
connector that can route out a signal from multiple sources,
including the onboard VCXO reference (divided by 1 to 255), the
star trigger bus, the PXI trigger bus, PFI0 connector, and the PXI
10 MHz reference clock. The PFI0 connector is a bidirectional
connector. As an input, the PFI0 connector can accept a trigger
that initiates sine and clock generation from an external source.
As an output, the PFI0 connector can route out the same set of
signals as the REF OUT connector.
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