UPD780078 Datasheet, PDF (347/592 Pages) NEC – 8-Bit Single-Chip Microcontrollers

CHAPTER 18 SERIAL INTERFACE IIC0 (µPD780078Y SUBSERIES ONLY)
Figure 18-7. Format of IIC Transfer Clock Select Register 0 (IICCL0) (2/2)
DFC0
0
1
Digital filter off
Digital filter on
Control of digital filter operation^{Note 1}
CL00
0
fX/44
1
fX/86
Selection of transfer rate
Standard mode
fX = 8.38 MHz
190.4 kHz^{Note 2}
fX/24
97.5 kHz
High-speed mode
fX = 8.38 MHz
350 kHz
Notes 1. The digital filter can be used when in high-speed mode. The response time is slower when the digital
filter is used.
2. The transfer rate in standard mode must not be set when fX is more than 100 kHz.
Caution Stop serial transfer once before rewriting CL00 to other than the same value.
Remarks 1. fX: Main system clock oscillation frequency
2. The transfer clock does not change in the high-speed mode even if DFC0 is turned on and off.
(4) Port mode register 3 (PM3)
PM3 is a register that set the input/output of port 3 in 1-bit units.
To use the P32/SDA0 pin as serial data I/O and the P33/SCL0 pin as clock I/O, set PM32 and PM33, and the
output latches of P32 and P33 to 0.
PM3 is set by a 1-bit or 8-bit memory manipulation instruction.
RESET input sets PM3 to FFH.
Figure 18-8. Format of Port Mode Register 3 (PM3)
Address: FF23H After reset: FFH
Symbol
7
6
PM3
1
PM36
R/W
5
PM35
4
PM34
3
PM33
2
PM32
1
PM31
0
PM30
PM3n
0
1
I/O mode selection of P3n pin (n = 0 to 6)
Output mode (output buffer on)
Input mode (output buffer off)
User’s Manual U14260EJ3V1UD
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