UPD17717 Datasheet, PDF (346/408 Pages) NEC – 4-BIT SINGLE-CHIP MICROCONTROLLERS WITH DEDICATED HARDWARE FOR DIGITAL TUNING SYSTEM

µPD17717, 17718, 17719
20.2.5 Releasing halt status by basic timer 0 carry FF
Releasing the halt status by using the basic timer 0 carry FF is specified by the “HALT 0010B” instruction.
When releasing the halt status by the basic timer 0 carry FF is specified, the halt status is released as soon as
the basic timer 0 carry FF has been set to 1.
The basic timer 0 carry FF corresponds to the BTM0CY flag on a one-to-one basis and is set at fixed time intervals
(100, 50, 20, or 10 ms). Therefore, the halt status can be released at fixed time intervals.
Example To release halt status every 100 ms to execute processing A
HLTTMR
LOOP:
DAT
INITFLG
HALT
SKT1
BR
0010B
; Symbol definition
NOT BTM0CK1, NOT BTM0CK0 ; Sets time interval of basic timer 0 to 100 ms
HLTTMR
BTMOCY
LOOP
; Specifies setting of basic timer 0 carry FF as halt releasing condition
; Embedded macro
; Branches to LOOP if BTM0CY flag is not set
Processing A
; Executes processing A if carry occurs
BR
LOOP
20.2.6 Releasing halt status by interrupt
Releasing the halt status by an interrupt is specified by the “HALT 1000B” instruction.
When releasing the halt status by an interrupt is specified, the halt status is released as soon as the interrupt has
been accepted.
Many interrupt sources are available as described in 12. INTERRUPTS. Which interrupt source is used to release
the halt status must be specified in advance in software.
To accept an interrupt, each interrupt request must be issued from each interrupt source and each interrupt must
be enabled (by setting the corresponding interrupt enable flag).
Therefore, the interrupt is not accepted even if the interrupt request is issued, and the halt status is not released.
When the halt status is released by accepting an interrupt, the program flow branches to the vector address of the
interrupt.
When the RETI instruction is executed after interrupt servicing, the program flow is restored to the instruction after
the HALT instruction.
If all the interrupts are disabled (DI status), the halt status is released by enabling an interrupt (IPxxx = 1) and issuing
an interrupt source (IRQxxx = 1), and the flow of the program goes to the instruction after the HALT instruction.
346