UPD784044 Datasheet, PDF (30/90 Pages) NEC – 16-BIT SINGLE-CHIP MICROCONTROLLER

µPD784044(A), 784046(A)
Table 7-1. Port Function
Port Name Pin Name
Port 0
P00-P03
Port 1
P10-P13
Port 2
P20-P27
Port 3
Port 4
Port 5
Port 6
Port 7
Port 8
Port 9
P30-P37
P40-P47
P50-P57
P60-P63
P70-P77
P80-P87
P90-P94
Function
Can be set in input or output mode bit-wise.
Can be set in input or output mode bit-wise
(however, P20 is input-only).
Can be set in input or output mode bit-wise.
Input port
Can be set in input or output mode bit-wise.
Specification of Pull-Up Resistor by Software
All pins in input mode
–
All pins in input mode
–
All pins in input mode
7.2 Clock Generation Circuit
The clock generation circuit generates and controls the internal system clock (CLK) to be supplied to the CPU.
Figure 7-2 shows the configuration of this circuit.
Figure 7-2. Block Diagram of Clock Generation Circuit
Divider
X1
Clock
generation
fXX or fX
fCLK
1/2
Internal system clock (CLK)
circuit
X2
Remark fXX : crystal/ceramic oscillation frequency
fX : external clock frequency
fCLK : internal system clock frequency
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