UPD17016 Datasheet, PDF (266/324 Pages) NEC – 4-BIT SINGLE-CHIP MICROCONTROLLERS WITH DIGITAL TUNING SYSTEM HARDWARE

µPD17016, 17017
21.4 Output Timing Control Blocks and Segment/Port Select Block
21.4.1 Configuration of output timing control blocks and segment/port select block
Figure 21-7 shows the configuration of the common signal and segment signal/key source signal output timing
control block and segment signal/general-purpose output port select block.
Figure 21-7. Configuration of Timing Control Blocks and Port Select Block
Control register
Address
10H
Bit
Flag
symbol
b3 b2 b1 b0
00 ^KL
SC
ED
NE
N
VDD
LCD0/KS0
LCD15/KS15
VDD
LCD16
Segment signal/
key source signal
timing control
Key source
data register
b0 LCD segment
b1 register
Segment signal
timing control
b0 LCD segment
b1 register
LCD21
LCD22/P0E0
LCD25/P0E3
LCD26/P0F0
LCD28/P0F2
LCD29/P0F3
Setting by
software macro
COM0
VDD
1
0
VDD
1
0
VDD
VDD
Segment signal
timing control
Segment signal
timing control
Basic clock for
timing control
b0 LCD segment
b1 register
Port data
b2 LCD segment
b3 register
Common signal
timing control
266
COM1