UPD17016 Datasheet, PDF (1/324 Pages) NEC – 4-BIT SINGLE-CHIP MICROCONTROLLERS WITH DIGITAL TUNING SYSTEM HARDWARE

DATA SHEET
MOS INTEGRATED CIRCUIT
µPD17016, 17017
4-BIT SINGLE-CHIP MICROCONTROLLERS WITH
DIGITAL TUNING SYSTEM HARDWARE
The µPD17016 and 17017 are 4-bit single-chip CMOS microcontrollers equipped with hardware for digital tuning
systems.
The CPU employs the 17K architecture and can directly manipulate the data memory, execute various operations,
and control the peripheral hardware with a single instruction. All the instructions are one-word 16-bit instructions.
As the peripheral hardware, a prescaler that can operate at up to 150 MHz, PLL frequency synthesizer, and
frequency counter for digital tuning systems, as well as many I/O ports, an LCD controller/driver, A/D converter, and
D/A converter (PWM output) are provided.
Therefore, a high-performance, state-of-the-art digital tuning system can be organized with a single chip.
In addition to the µPD17016 and 17017, a one-time PROM model for program evaluation, the µPD17P005, is also
available.
FEATURES
• 17K architecture: general-purpose register method
• Program memory (ROM)
8 KB (3836 × 16 bits) : µPD17016
16 KB (7932 × 16 bits) : µPD17017
• General-purpose data memory (RAM)
320 × 4 bits: µPD17016
432 × 4 bits: µPD17017
• Instruction execution time
4.44 µs (with 4.5-MHz crystal resonator)
• Decimal operation
• Table reference
• Hardware for PLL frequency synthesizer
Dual modulus prescaler (150 MHz max.), programmable
divider, charge pump
• A wealth of peripheral hardware
General-purpose I/O ports, LCD controller/driver, se-
rial interface, A/D converter, D/A converter (PWM
output), BEEP output, frequency counter
• Interrupt
External: 1
Internal: 1
• Power-ON reset, reset by CE pin, and power failure
detection circuit
• Power-saving CMOS
• Supply voltage: VDD = 5 V±10%
Unless otherwise specified, the µPD17017 is explained as the representative model in this document.
The information in this document is subject to change without notice.
Document No. U10664EJ2V0DS00 (2nd edition)
The mark shows major revised points.
Date Published September 1996 P
Printed in Japan
©
1996