UPD17704 Datasheet, PDF (25/356 Pages) NEC – 4-BIT SINGLE-CHIP MICROCONTROLLERS WITH DEDICATED HARDWARE FOR DIGITAL TUNING SYSTEM

µPD17704, 17705, 17707, 17708, 17709
2.2 Program Memory
Figure 2-2 shows the configuration of the program memory.
As shown in this figure, the µPD17704 has 16K bytes (8192 × 16 bits) of program memory, the µPD17707
has 24K bytes (12288 × 16 bits), and the µPD17708 and 17709 have 32K bytes (16384 × 16 bits).
Therefore, the program memory addresses of the µPD17704 are 0000H through 1FFFH, those of the
µPD17705, 17707 are 0000H through 2FFFH, and those of the µPD17708 and 17709 are 0000H through 3FFFH.
Because all “instructions” are “one-word instructions”, one instruction can be stored to one address of the
program memory.
As constant data, the contents of the program memory are read to the data buffer by using a table reference
instruction.
Figure 2-2. Configuration of Program Memory
Address
0 0 0 0 H Reset start address
0 0 0 1 H Serial interface 1 interrupt vector
0 0 0 2 H Serial interface 0 interrupt vector
0 0 0 3 H Timer 3 interrupt vector
0 0 0 4 H Timer 2 interrupt vector
0 0 0 5 H Timer 1 interrupt vector
0 0 0 6 H Timer 0 interrupt vector
0 0 0 7 H INT4 pin interrupt vector
0 0 0 8 H INT3 pin interrupt vector
0 0 0 9 H INT2 pin interrupt vector
0 0 0 A H INT1 pin interrupt vector
0 0 0 B H INT0 pin interrupt vector
0 0 0 C H Falling edge interrupt vector of CE pin
Page 0
CALL addr
instruction
subroutine
entry address
BR @AR instruction
branch address
CALL @AR instruction
subroutine entry address
Segment 0 BR addr
instruction
branch
address
MOVT DBF, @AR instruction
table reference address
0 7 F FH
0FFFH
1 7 F FH
1FFFH
2000H
( µPD17704)
2FFFH
( µPD17705, 17707)
Page 1
Page 2
Page 3
Page 0
CALL addr
instruction
subroutine
entry address
Page 1
Segment 1 BR addr
(system instruction
segment) branch
address
Page 2
Page 3
3FFFH
( µPD17708, 17709)
16 bits
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