N32T1630C1C Datasheet, PDF (2/15 Pages) NanoAmp Solutions, Inc. – 32Mb Ultra-Low Power Asynchronous CMOS Pseudo SRAM

NanoAmp Solutions, Inc.
Functional Block Diagram
N32T1630C1C
Word
Address
Inputs
A0 - A3
Page
Address
Inputs
A4 - A20
Word
Address
Decode
Logic
Page
Address
Decode
Logic
128K page
x 16 word
x 16 bit
RAM Array
Input/
Output
Mux
and
Buffers
I/O0 - I/O7
I/O8 - I/O15
CE
ZZ
Control
WE
Logic
OE
UB
LB
Functional Description
CE ZZ WE OE UB LB
I/O₀ - I/O₁₅₁
MODE
POWER
H
H
X
X
X
X
X
H
X
X
H
H
L
H
L
X³
L¹
L¹
L
H
H
L
L¹
L¹
L
H
H
H
L
L
X
L
X
X
X
X
High Z
High Z
Data In
Data Out
High Z
High Z
Standby²
Standby²
Write
Read
Active
Deep Sleep
Standby
Standby
Active
Active
Active
Deep Sleep
1. When UB and LB are in select mode (low), I/O₀ - I/O₁₅ are affected as shown. When LB only is in the select mode only I/O₀ - I/O₇
are affected as shown. When UB is in the select mode only I/O₈ - I/O₁₅ are affected as shown.
2. When the device is in standby mode, control inputs (WE, OE, UB, and LB), address inputs and data input/outputs are internally
isolated from any external influence and disabled from exerting any influence externally.
3. When WE is invoked, the OE input is internally disabled and has no effect on the circuit.
Capacitance¹
Item
Symbol
Test Condition
Input Capacitance
I/O Capacitance
C_IN
V_IN = 0V, f = 1 MHz, T_A = 25^oC
C_I/O
V_IN = 0V, f = 1 MHz, T_A = 25^oC
1. These parameters are verified in device characterization and are not 100% tested
Min Max Unit
6
pF
8
pF
(DOC# 14-02-005 Rev C ECN 01-0918)
2
The specifications of this device are subject to change without notice. For latest documentation see http://www.nanoamp.com.