N16D1618LPA Datasheet, PDF (15/27 Pages) NanoAmp Solutions, Inc. – 512K × 16 Bits × 2 Banks Low Power Synchronous DRAM

NanoAmp Solutions, Inc.
N16D1618LPA
Advance Information
Table 5: Function Truth Table
Current
Command
State
/CS /RAS /CAS /WE A11
A0-A10
Description
Action
L
L
L
L
READ
L
L
with
L
L
AUTO
PRE-
L
H
CHARGE
L
H
L
H
H
X
L
L
L
L
WRITE
L
L
with
L
L
AUTO
PRE-
L
H
CHARGE
L
H
L
H
H
X
L
L
L
L
L
L
PRE-
L
L
CHARG-
L
H
ING
L
H
L
H
H
X
L
L
L
L
L
L
L
L OP CODE
Mode Register Set ILLEGAL
L
HX
X
Auto or Self Refresh ILLEGAL
H
L BA X
Precharge
ILLEGAL
H
H BA Row Addr
Bank Active
ILLEGAL
L
L BA Col Addr/A10 Write/Write AP
ILLEGAL
L
H BA Col Addr/A10 Read/Read AP
ILLEGAL
H
HX
X
NOP
Continue the Burst
X
XX
X
Device Deselect
Continue the Burst
L
L OP CODE
Mode Register Set ILLEGAL
L
HX
X
Auto or Self Refresh ILLEGAL
H
L BA X
Precharge
ILLEGAL
H
H BA Row Addr
Bank Active
ILLEGAL
L
L BA Col Addr/A10 Write/Write AP
ILLEGAL
L
H BA Col Addr/A10 Read/Read AP
ILLEGAL
H
HX
X
NOP
Continue the Burst
X
XX
X
Device Deselect
Continue the Burst
L
L OP CODE
Mode Register Set ILLEGAL
L
HX
X
Auto or Self Refresh ILLEGAL
H
L BA X
Precharge
No Operation: Bank(s)
Idle after tRP
H
H BA Row Addr
Bank Active
ILLEGAL
L
L BA Col Addr/A10 Write/Write AP
ILLEGAL
L
H BA Col Addr/A10 Read/Read AP
ILLEGAL
H
HX
X
NOP
No Operation: Bank(s)
Idle after tRP
X
XX
X
Device Deselect
No Operation: Bank(s)
Idle after tRP
L
L OP CODE
Mode Register Set ILLEGAL
L
HX
X
Auto or Self Refresh ILLEGAL
H
L BA X
Precharge
ILLEGAL
L
L
ROW
ACTIVAT-
L
H
ING
L
H
L
H
H
X
H
H BA Row Addr
Bank Active
L
L BA Col Addr/A10 Write/Write AP
L
H BA Col Addr/A10 Read/Read AP
H
HX
X
NOP
X
XX
X
Device Deselect
ILLEGAL
ILLEGAL
ILLEGAL
No Operation: Row Acti-
vated after tRCD
No Operation: Row Acti-
vated after tRCD
Note
13,14
13
4,12
4,12
12
12
13,14
13
4,12
4,12
12
12
13,14
13
4,12
4,12
4,12
13,14
13
4,12
4, 11,
12
4,12
4,12
Stock No. 23395- Rev L 1/06
15
The specifications of this device are subject to change without notice. For latest documentation see http://www.nanoamp.com.