ADS-230 Datasheet, PDF (7/12 Pages) Murata Power Solutions Inc. – Low-Power, 12-Bit, 1.0/1.5MHz Sampling A/D Converter

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Timing
The ADS-230/-231 has two modes of operation as shown
in Figure 5, 6, 7 and 8.
In the Interrupt Interface mode, as shown in Figure 5, the
falling edge of S/H holds the input voltage and initiates a
conversion when CS is held low. At the end of conversion,
the EOC output goes high and the INT output goes low,
ADS-230/ADS-231
indicating that the conversion results are latched and may
be read by pulling RD low. The falling edge of RD resets
the INT line.
The High Speed Interface mode is shown in Figure 6. In
this mode the output data is always present, and the INT to
RD delay is eliminated.
The control logic decoding section is shown in Figure 8.
INPUT
CS
S/H
EOC
SEL
INT
RD
BIT 1 - BIT 12
tAD
N
N+1
N+2
tTHROUGHPUT
tCONV
tS/H
tEOC
N+1
tINT
tMS
tMH
N+2
DATA (N-1)
tINTH
tACC
DATA (N)
t1H.OH
Figure 5. Interrupt Interface Timing (MD = 0, OE = 1)
INPUT
S/H
EOC
tAD
N
N+1
tTHROUGHPUT
tCONV
tS/H
tEOC
SEL
IT 1 - BIT 12
N+1
DATA (N-1)
N+2
tMS
tMH
N+2
tUPDATE
DATA (N)
Figure 6. High-speed Interface Timing (MD = 0, OE = 1, CS = 0, RD = 0)
tCSS
tCSH
CS
S/H
RD
OE
Figure 7. CS Setup & Hold Timing for S/H, RD and OE
ADS-230/231
S/H
INTERNAL S/H
CS
RD
INTERNAL OUTPUT
ENABLE
OE
INT
INT FROM INTERNAL STATE MACHINE
Figure 8. ADS Control Logic
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