MRF5003 Datasheet, PDF (9/10 Pages) Motorola, Inc – N-CHANNEL BROADBAND RF POWER FET

DESIGN CONSIDERATIONS
The MRF5003 is a common–source, RF power, N–Chan-
nel enhancement mode, Metal–Oxide Semiconductor Field–
Effect Transistor (MOSFET). Motorola RF MOSFETs feature
a vertical structure with a planar design. Motorola Application
Note AN211A, “FETs in Theory and Practice”, is suggested
reading for those not familiar with the construction and char-
acteristics of FETs.
This surface mount packaged device was designed pri-
marily for VHF and UHF power amplifier applications.
Manufacturability is improved by utilizing the tape and reel
capability for fully automated pick and placement of parts.
The major advantages of RF power MOSFETs include
high gain, simple bias systems, relative immunity from ther-
mal runaway, and the ability to withstand severely mis-
matched loads without suffering damage.
MOSFET CAPACITANCES
The physical structure of a MOSFET results in capacitors
between all three terminals. The metal oxide gate structure
determines the capacitors from gate–to–drain (Cgd), and
gate–to–source (Cgs). The PN junction formed during fab-
rication of the RF MOSFET results in a junction capacitance
from drain–to–source (Cds). These capacitances are charac-
terized as input (Ciss), output (Coss) and reverse transfer
(Crss) capacitances on data sheets. The relationships be-
tween the inter–terminal capacitances and those given on
data sheets are shown below. The Ciss can be specified in
two ways:
1. Drain shorted to source and positive voltage at the gate.
2. Positive voltage of the drain in respect to source and zero
volts at the gate.
In the latter case, the numbers are lower. However, neither
method represents the actual operating conditions in RF ap-
plications.
Cgd
GATE
Cgs
DRAIN
Cds
SOURCE
Ciss = Cgd + Cgs
Coss = Cgd + Cds
Crss = Cgd
DRAIN CHARACTERISTICS
One critical figure of merit for a FET is its static resistance
in the full–on condition. This on–resistance, RDS(on), occurs
in the linear region of the output characteristic and is speci-
fied at a specific gate–source voltage and drain current. The
drain–source voltage under these conditions is termed
VDS(on). For MOSFETs, VDS(on) has a positive temperature
coefficient at high temperatures because it contributes to the
power dissipation within the device.
GATE CHARACTERISTICS
The gate of the RF MOSFET is a polysilicon material, and
is electrically isolated from the source by a layer of oxide.
The input resistance is very high — on the order of 109 Ω —
resulting in a leakage current of a few nanoamperes.
Gate control is achieved by applying a positive voltage to
the gate greater than the gate–to–source threshold voltage,
VGS(th).
Gate Voltage Rating — Never exceed the gate voltage
rating. Exceeding the rated VGS can result in permanent
damage to the oxide layer in the gate region.
Gate Termination — The gates of these devices are es-
sentially capacitors. Circuits that leave the gate open–cir-
cuited or floating should be avoided. These conditions can
result in turn–on of the devices due to voltage build–up on
the input capacitor due to leakage currents or pickup.
Gate Protection — These devices do not have an internal
monolithic zener diode from gate–to–source. If gate protec-
tion is required, an external zener diode is recommended
with appropriate RF decoupling.
Using a resistor to keep the gate–to–source impedance
low also helps dampen transients and serves another impor-
tant function. Voltage transients on the drain can be coupled
to the gate through the parasitic gate–drain capacitance. If
the gate–to–source impedance and the rate of voltage
change on the drain are both high, then the signal coupled to
the gate may be large enough to exceed the gate–threshold
voltage and turn the device on.
DC BIAS
Since the MRF5003 is an enhancement mode FET, drain
current flows only when the gate is at a higher potential than
the source. See Figure 8 for a typical plot of drain current ver-
sus gate voltage. RF power FETs operate optimally with a
quiescent drain current (IDQ), whose value is application de-
pendent. The MRF5003 was characterized at IDQ = 50 mA,
which is the suggested value of bias current for typical ap-
plications. For special applications such as linear amplifica-
tion, IDQ may have to be selected to optimize the critical
parameters.
The gate is a dc open circuit and draws no current. There-
fore, the gate bias circuit may generally be just a simple re-
sistive divider network. Some special applications may
require a more elaborate bias system.
GAIN CONTROL
Power output of the MRF5003 may be controlled from its
rated value down to zero (negative gain) with a low power dc
control signal, thus facilitating applications such as manual
gain control, ALC/AGC and modulation systems. Figure 16 is
an example of output power variation with gate–source bias
voltage. This characteristic is very dependent on frequency
and load line.
MOUNTING
The specified maximum thermal resistance of 14°C/W as-
sumes a majority of the 0.100″ x 0.200″ source contact on
the back side of the package is in good contact with an ap-
propriate heat sink. In the test fixture shown in Figure 1, the
device is clamped directly to a copper pedestal. In the dem-
onstration amplifier, the device was mounted on top of the
G10 circuit board and heat removal was accomplished
through several solder filled plated through holes. As with all
RF power devices, the goal of the thermal design should be
to minimize the temperature at the back side of the package.
MOTOROLA RF DEVICE DATA
MRF5003
9