MC9S12B128 Datasheet, PDF (71/128 Pages) Motorola, Inc – microcontroller unit (MCU)

Device User Guide —9S12B128DGV1/D V01.11
6.5 HCS12 Background Debug (BDM) Block Description
Consult the BDM Block Guide for information on the HCS12 Background Debug module.
6.5.1 Device-specific information
When the BDM Block Guide refers to alternate clock this is equivalent to Oscillator Clock.
6.6 HCS12 Breakpoint (BKP) Block Description
Consult the BKP Block Guide for information on the HCS12 Breakpoint module.
Section 7 Voltage Regulator (VREG3V3) Block Description
Consult the VREG3V3 Block User Guide for information about the dual output linear voltage regulator.
VREGEN is accessible externally.
Section 8 Clock and Reset Generator (CRG) Block
Description
Consult the CRG Block User Guide for information about the Clock and Reset Generator module.
8.1 Device-specific information
The Low Voltage Reset feature of the CRG is available on this device.
NOTE: If the voltage regulator is shut downed by connecting VREGEN to the
corresponding ground pin then the LVRF flag in the CRG Flags Register
(CRGFLG) is undefined.
Section 9 Oscillator (OSC) Block Description
Consult the OSC Block User Guide for information about the Oscillator module.
9.1 Device-specific information
The XCLKS input signal is active low (see 2.2.10 PE7 / NOACC / XCLKS — Port E I/O Pin 7).
Section 10 Standard Timer (TIM) Block Description
71