MCD212 Datasheet, PDF (45/87 Pages) Motorola, Inc – Video Decoder and System Controller(with JTAG)

5.4.4.11 Cursor Pattern Register (hCF)
Programmable via CH#1.
Table 5–30. Cursor Pattern Register — Address hCF
23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
— — — — AD AD AD AD CP CP CP CP CP CP CP CP CP CP CP CP CP CP CP CP
3 2 1 0 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
AD3 – AD0: Y address register
CP15 – CP0: line pattern register:
CP15 is the left–most pixel.
CP0 is the right–most pixel.
AD
CP15
CP0
0 HEX
F HEX
Figure 5–11. Cursor Pattern Diagram
5.4.4.12 Region Control Register 0 - 7 (hD0 - hD7)
Programmable via CH#1 and CH#2.
In case the registers are loaded simultaneously from both channels, then CH#1 has the first priority.
At that moment CH#2 will be ignored.
If the region control is not used, then the operation code OP3 – OP0 of the region control register D0
and D4 must be 0000. This means the end of the region control for the line.
Table 5–31. Region Control Register — Address hD0 – hD7
23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
OP OP OP OP — — — RF WF WF WF WF WF WF X9 X8 X7 X6 X5 X4 X3 X2 X1 X0
3210
543210
OP3 OP2 OP1 OP0: operation control
5–16
MCD212
MOTOROLA