56F8345 Datasheet, PDF (33/148 Pages) Motorola, Inc – 56F8345 16-bit Hybrid Controller

Freescale Semiconductor, Inc.
Program Map
4.2 Program Map
The Program memory map is located in Table 4-4. The operating mode control bits (MA and MB)
in the Operating Mode Register (OMR) control the Program memory map. At reset, these bits are
set as indicated in Table 4-2.
EXT_BOOT = EMI_MODE = 0 and cannot be changed in the 56F8345.
Table 4-2 OMR MB/MA Value at Reset¹
OMR MB =
Flash Secured
State^2,3
OMR MA =
EXTBOOT Pin
Chip Operating Mode
0
0
Mode 0 – Internal Boot; EMI is configured to use 16 address lines; Flash
Memory is secured; external P-space is not allowed; the EOnCE is disabled
0
1
Not valid; cannot boot externally if the Flash is secured and will actually
configure to 00 state
1
0
Mode 0 – Internal Boot; EMI is configured to use 16 address lines
1
1
Mode 1 – External Boot; Flash Memory is not secured; EMI configuration is
determined by the state of the EMI_MODE pin
1. Information in shaded areas not applicable to 56F8345.
2. This bit is only configured at reset. If the Flash secured state changes, this will not be reflected in MB until the next reset.
3. Changing MB in software will not affect Flash memory security.
After reset, the OMR MA bit can be changed and will have an effect on the P-space memory map,
as shown in Table 4-3. Changing the OMR MB bit will have no effect.
Table 4-3 Changing OMR MA Value During Normal Operation
OMR MA
Chip Operating Mode
0
Use internal P-space memory map configuration
1¹
Use external P-space memory map configuration – If MB = 0 at reset, changing this bit has no
effect.
1. Setting this bit can cause unpredictable results and is not recommended, since the EMI is not functional in this package.
Table 4-4 shows the memory map options of the 56F8345. The two right columns cannot be used,
since the EMI pins are not provided in the package; therefore, only the Mode 0 column is relevant.
56F8345 Technical Data
33
Preliminary
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