MC68HCP11 Datasheet, PDF (28/45 Pages) Motorola, Inc – 8-Bit Microcontroller

RDRF — Receive Data Register Full Flag
Set if a received character is ready to be read from SCDR. Cleared by SCSR read with RDRF set fol-
lowed by SCDR read.
IDLE — Idle Line Detected Flag
Set if the RxD line is idle. IDLE flag is inhibited when RWU is set to one. Cleared by SCSR read with
IDLE set followed by SCDR read. Once cleared, IDLE is not set again until the RxD line has been active
and becomes idle again.
OR — Overrun Error Flag
Set if a new character is received before a previously received character is read from SCDR. Cleared
by SCSR read with OR set followed by SCDR read.
NF — Noise Error Flag
Set if majority sample logic detects anything other than a unanimous decision. Cleared by SCSR read
with NF set followed by SCDR read.
FE — Framing Error
Set if a zero is detected where a stop bit was expected. Cleared by SCSR read with FE set followed by
SCDR read.
SCDR — SCI Data Register
RESET:
Bit 7
R7/T7
U
6
R6/T6
U
5
R5/T5
U
4
R4/T4
U
3
R3/T3
U
2
R2/T2
U
$102F
1
R1/T1
U
Bit 0
R0/T0
U
NOTE
Receive and transmit are double buffered. Reads access the receive data buffer
and writes access the transmit data buffer.
MOTOROLA
28
MC68HC11A8
MC68HC11A8TS/D