MC56F8346 Datasheet, PDF (27/160 Pages) Motorola, Inc – 56F8346 16-bit Hybrid Controller

Freescale Semiconductor, Inc.
56F8346 Signal Pins
Table 2-2 56F8346 Signal and Package Information for the 144 Pin LQFP
Signal Name Pin No. Type
PWMB0
PWMB1
PWMB2
PWMB3
PWMB4
PWMB5
ISB0
34
Output
35
36
39
40
41
50
Schmitt
Input
State
During
Reset
Tri-State
Signal Description
PWMB0 - 5 — Six PWMB output pins.
Input
ISB0 - 2 — These three input current status pins are used
for top/bottom pulse width correction in complementary
channel operation for PWMB.
(GPIOD10)
ISB1
(GPIOD11)
ISB2
(GPIOD12)
FAULTB0
FAULTB1
FAULTB2
FAULTB3
ANA0
ANA1
ANA2
ANA3
ANA4
ANA5
ANA6
ANA7
V_REFH
V_REFP
V_REFMID
V_REFN
V_REFLO
Schmitt
52
Input/
Output
53
56
Schmitt
Input
57
58
61
88
Input
89
90
91
92
Input
93
94
95
101
Input
100
Input/
Output
99
98
97
Input
Input
Input
Input
Port D GPIO — These three GPIO pins can be individually
programmed as input or output pins.
At reset, these pins default to ISB functionality.
To deactivate the internal pull-up resistor, clear the
appropriate bit of the GPIOD_PUR register. For details,
see Section 6.5.8.
FAULTB0 - 3 — These four fault input pins are used for
disabling selected PWMB outputs in cases where fault
conditions originate off-chip.
To deactivate the internal pull-up resistor, set the PWMB
bit in the SIM_PUDR register. For details, see Section
6.5.8.
ANA0 - 3 — Analog inputs to ADC A, channel 0
Input
ANA4 - 7 — Analog inputs to ADC A, channel 1
Input
Input/
Output
V_REFH — Analog Reference Voltage High. V_REFH must be
less than or equal to V_{DDA_ADC.}
V_REFP, V_REFMID & V_REFN — Internal pins for voltage
reference which are brought off-chip so they can be
bypassed. Connect to a 0.1µF low ESR capacitor.
Input
V_REFLO — Analog Reference Voltage Low. This should
normally be connected to a low-noise V_SSA.
56F8346 Technical Data
27
Preliminary
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