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M68060 Datasheet, PDF (194/416 Pages) Motorola, Inc – M68060 User Manual | |||
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PROCESSOR
1) SET R/W TO READ
3) DRIVE ADDRESS ON A31âA0 TO $00000000
4) DRIVE UPA1âUPA0 = 0
5) DRIVE TT1âTT0 = 3
6) DRIVE TM2âTM0 = 0
7) DRIVE TLN1âTLN0 = 0
8) ASSERT BS0
9) NEGATIVE CIOUT, LOCK, LOCKE, BS3âBS1
10) DRIVE SIZ1âSIZ0 TO BYTE
11) ASSERT TS FOR ONE BCLK
12) ASSERT TIP
13) ASSERT SAS IMMEDIATELY IF
ACKNOWLEDGE TERMINATION IGNORE
STATE CAPABILITY DISABLED. ELSE,
ASSERT SAS AFTER READ PRIMARY
IGNORE STATE COUNTER HAS EXPIRED
1) IF NORMAL OR BUS ERROR TERMINATION
TAKE EXCEPTION USING VECTOR 4
(ILLEGAL INSTRUCTION EXCEPTION
VECTOR) AFTER COMPLETION OF BUS
CYCLE
2) IF RETRY TERMINATION, RETRY BREAK-
POINT ACKNOWLEDGE CYCLE
SYSTEM
Bus Operation
1) DECODE ADDRESS AND ATTRIBUTES
2) ASSERT TA, TEA, OR TRA FOR ONE BCLK
1) NEGATE TIP OR START NEXT CYCLE
2) INITIATE EXCEPTION PROCESSING
Figure 7-30. Breakpoint Interrupt Acknowledge Cycle Flowchart
retry termination simply retries the LPSTOP broadcast cycle. The lower data bits D15âD0
are driven with the LPSTOP immediate word value and the upper data bits D31âD16 are
driven high. After a number of CLK cycles, PSTx change to $16. The timing of when the
PSTx signals are updated relative to the LPSTOP broadcast cycle is undefined.
Once the LPSTOP broadcast cycle is finished, no bus arbitration activity is performed by the
MC68060. Furthermore, it is imperative that no alternate master bus activity be done from
the time the LPSTOP broadcast cycle is finished to when the LPSTOP encoding is indicated
by PSTx. For systems that require the MC68060 to be three-stated when in the LPSTOP
mode, the bus must be arbitrated away during the LPSTOP broadcast cycle. This is easily
achieved by having the BG input negated at the same time as TA or TEA. For additional
power savings, CLK may be stopped in the low state while in the LPSTOP mode. Systems
must ensure that CLK only be stopped when the PSTx signals indicate $16.
Figure 7-32 illustrates a flowchart of the LPSTOP broadcast cycle. Figure 7-33 and Figure
7-34 illustrate functional timing diagrams for an LPSTOP broadcast cycle as a function of
BG.
MOTOROLA
M68060 USERâS MANUAL
7-39
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