56F8356 Datasheet, PDF (1/160 Pages) Motorola, Inc – 56F8356 16-bit Hybrid Controller

Freescale Semiconductor, Inc.
MC56F8356/D
Rev. 6.0, 6/2004
56F8356
Preliminary Technical Data
56F8356 16-bit Hybrid Controller
• Up to 60 MIPS at 60MHz core frequency
• Temperature Sensor
• DSP and MCU functionality in a unified,
C-efficient architecture
• Access up to 1MB of off-chip program and data
memory
• Chip Select Logic for glueless interface to ROM
and SRAM
• 256KB of Program Flash
• 4KB of Program RAM
• 8KB of Data Flash
• 16KB of Data RAM
• 16KB of Boot Flash
• Two 6-channel PWM modules
• Two Quadrature Decoders
• Optional on-chip regulator
• FlexCAN module
• Two Serial Communication Interfaces (SCIs)
• Up to two Serial Peripheral Interfaces (SPIs)
• Up to four general-purpose Quad Timers
• Computer Operating Properly (COP) / Watchdog
• JTAG/Enhanced On-Chip Emulation (OnCE™) for
unobtrusive, real-time debugging
• Up to 62 GPIO lines
• 144-pin LQFP Package
• Four 4-channel, 12-bit ADCs
RSTO ^EMI_MODE
EXTBOOT
RESET
5
V_PP V_CAP
2
4
OCR_DIS
V_DD
V_ss
7
5
V_DDA
2
V_SSA
6 _{PWM Outputs}
3
Current Sense Inputs
3
or GPIOC
Fault Inputs
PWMA
JTAG/
EOnCE
Port
Digital Reg Analog Reg
16-Bit
Low Voltage
56800E Core ^Supervisor
6 _{PWM Outputs}
3
Current Sense Inputs
or GPIOD
4
Fault Inputs
4
AD0
4
ADCA
AD1
Program Controller
and
PWMB Hardware Looping Unit
Address
Generation Unit
PAB
PDB
CDBR
CDBW
Data ALU
16 x 16 + 36 -> 36-Bit MAC
Three 16-bit Input Registers
Four 36-bit Accumulators
Bit
Manipulation
Unit
5
VREF
Memory
4
4
AD0
Program Memory
ADCB 128K x 16 Flash
AD1
2K x 16 RAM
XDB2
XAB1
XAB2
TEMP_SENSE
Boot ROM
Quadrature
8K x 16 Flash
4
Decoder 0 or
Quad
Timer A or
GPIOC
Data Memory
4K x 16 Flash
4K x 16 RAM
PAB
PDB
CDBR
CDBW
R/W Control
6
External
2
Address Bus
Switch
8
System Bus
Control
7
External Data
Bus Switch ₉
Quadrature
Decoder 1 or
4
Quad
Timer B or
IPBus Bridge (IPBB)
SPI1 or
GPIOC
Quad
Decoding
Peripheral
Device Selects
RW
IPAB
Control
IPWDB
IPRDB
1
Timer C or
GPIOE Peripherals
Bus Control ²
A0-5 or GPIOA8-13
A6-7 or GPIOE2-3
A8-15 or GPIOA0-7
GPIOB0 or A16
D0-6 or GPIOF9-15
D7-15 or GPIOF0-8
WR
RD
GPIOD0-1 or CS2-3
PS or CS0 or GPIOD8
DS or CS1 or GPIOD9
Quad
2
Timer D or
GPIOE
Clock
resets
PLL
2
FlexCAN
System ^P
SPI0 or
GPIOE
SCI1 or
GPIOD
SCI0 or
COP/
Interrupt
GPIOE Watchdog Controller
Integration
O
R
Module
Clock O
Generator
S
C
XTAL
EXTAL
4
2
2
IRQA IRQB
CLKO CLKMODE
56F8356 Block Diagram
© Motorola, Inc., 2004. All rights reserved.
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