M2S56D20TP Datasheet, PDF (6/36 Pages) Mitsubishi Electric Semiconductor – 256M Double Data Rate Synchronous DRAM

DDR SDRAM (Rev.0.0)
Sep.'99 Preliminary
COMMAND TRUTH TABLE
MITSUBISHI LSIs
M2S56D20/ 30 TP
256M Double Data Rate Synchronous DRAM
COMMAND
MNEMONIC
CKE
n-1
CKE
n
/CS
/RAS /CAS
/WE BA0,1
A10 A0-9, _note
/AP 11-12
Deselect
No Operation
Row Address Entry &
Bank Activate
DESEL
NOP
ACT
H
X
H
X
X
X
X
X
X
H
X
L
H
H
H
X
X
X
H
X
L
L
H
H
V
V
V
Single Bank Precharge
Precharge All Banks
Column Address Entry
& Write
PRE
PREA
WRITE
H
X
L
L
H
L
V
L
X
H
X
L
L
H
L
X
H
X
H
X
L
H
L
L
V
L
V
Column Address Entry
& Write with
Auto-Precharge
WRITEA
H
X
L
H
L
L
V
H
V
Column Address Entry
& Read
Column Address Entry
& Read with
Auto-Precharge
READ
READA
H
X
L
H
L
H
V
L
V
H
X
L
H
L
H
V
H
V
Auto-Refresh
Self-Refresh Entry
Self-Refresh Exit
Burst Terminate
Mode Register Set
REFA
REFS
REFSX
TERM
MRS
H
H
L
L
L
H
X
X
X
H
L
L
L
L
H
X
X
X
L
H
H
X
X
X
X
X
X
L
H
L
H
H
H
X
X
X
H
X
L
H
H
L
X
X
X1
H
X
L
L
L
L
L
L
V2
H=High Level, L=Low Level, V=Valid, X=Don't Care, n=CLK cycle number
NOTE:
1. Applies only to read bursts with autoprecharge disabled; this command is undefined (and should not be used) for
read bursts with autoprecharge enabled, and for write bursts.
2. BA0-BA1 select either the Base or the Extended Mode Register (BA0 = 0, BA1 = 0 selects Mode Register; BA0 =
1, BA1 = 0 selects Extended Mode Register; other combinations of BA0-BA1 are reserved; A0-A11 provide the op-
code to be written to the selected Mode Register.
MITSUBISHI
ELECTRIC
6