PSS30S71F6 Datasheet, PDF (5/12 Pages) Mitsubishi Electric Semiconductor – Dual-In-Line Package Intelligent Power Module

< Dual-In-Line Package Intelligent Power Module >
PSS30S71F6
TRANSFER MOLDING TYPE
INSULATED TYPE
MECHANICAL CHARACTERISTICS AND RATINGS
Parameter
Condition
Mounting torque
Mounting screw : M3 (Note 6)
Terminal pulling strength
Load 9.8N
Terminal bending strength
Load 4.9N, 90deg. bend
Weight
Heat-sink flatness
Note 6: Plain washers (ISO 7089~7094) are recommended.
Note 7: Measurement point of heat sink flatness
Recommended 0.78N·m
EIAJ-ED-4701
EIAJ-ED-4701
(Note 7)
Min.
0.59
10
2
-
-50
Limits
Typ.
0.78
-
-
21
-
Max.
0.98
-
-
-
100
Unit
N·m
s
times
g
μm
12.78mm
Measurement position
-+
4.65mm
13.5mm
Heat sink side
23mm
+
-
Heat sink side
RECOMMENDED OPERATION CONDITIONS
Symbol
Parameter
Condition
Limits
Unit
Min.
Typ.
Max.
VCC
Supply voltage
Applied between P-NU, NV, NW
0
300
400
V
VD
Control supply voltage
Applied between VP1-VNC, VN1-VNC
13.5 15.0 16.5
V
VDB
Control supply voltage
Applied between VUFB-VUFS, VVFB-VVFS, VWFB-VWFS
13.0 15.0 18.5
V
ΔVD, ΔVDB Control supply variation
-1
-
+1 V/μs
tdead
Arm shoot-through blocking time For each input signal
1.5
-
-
μs
fPWM
PWM input frequency
TC ≤ 100°C, Tj ≤ 125°C
-
-
20 kHz
VCC = 300V, VD = 15V, P.F = 0.8,
fPWM= 5kHz
-
-
21.0
IO
Allowable r.m.s. current
Sinusoidal PWM
Arms
TC ≤ 100°C, Tj ≤ 125°C
(Note8) ^fPWM^{= 15kHz}
-
-
16.0
PWIN(on)
(Note 9)
0.7
-
-
Minimum input pulse width
PWIN(off)
200V≤VCC≤350V,
Below rated current
1.5
-
13.5V≤VD≤16.5V,
Between rated current
13.0V≤VDB≤18.5V,
and 1.7 times of rated
3.0
-
-20°C≤Tc≤100°C,
current
N-line wiring inductance Between 1.7 times and
less than 10nH (Note 10) 2.0 times of rated current
3.6
-
-
-
μs
-
VNC
VNC variation
Between VNC-NU, NV, NW (including surge)
-5.0
-
+5.0
V
Tj
Junction temperature
-20
-
+125 °C
Note 8: Allowable r.m.s. current depends on the actual application conditions.
9: DIPIPM might not make response if the input signal pulse width is less than PWIN(on)
10: IPM might make delayed response or no response for the input signal with off pulse width less than PWIN(off). Please refer below about delayed response.
Delayed Response against Shorter Input Off Signal than PWIN(off) (P-side only)
P Side Control Input
Internal IGBT Gate
Output Current Ic
t2
t1
Real line: off pulse width > PWIN(off); turn on time t1
Broken line: off pulse width < PWIN(off); turn on time t2
(t1:Normal switching time)
Publication Date : December 2013
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